This work reports the spectroscopic performance of the latest release of TERA (Throughput Enhanced Readout ASIC), a multichannel analog pulse processor (APP) ASIC suitable for detectors in ultra-high rate X-ray detection applications (>1Mcps/channel). The chip has been developed to process signals coming from Silicon Drift Detectors (SDDs) coupled with resettype Charge Sensitive Amplifiers (CSA). The demonstrator chip is composed of 4 parallel readout channels, each channel is composed by 7th-order semi-Gaussian shaping-amplifier with adjustable shaping times and dynamic range, followed by a peak stretcher and an analog memory. Each pair of channels can be optionally digitized by 12-bit on-chip ADC, providing the maximum sampling frequency up to 2.5MHz. TERA architecture enables to achieve simultaneously high throughput and satisfactory energy resolution. In 55Fe spectroscopy measurements using SDD collimated to 4mm diameter, at the shortest pulse width of 200ns, FWHM Mn-Ka line of 171.5eV and 205.1eV were obtained at input rate 10kcps and 1.61Mcps, respectively. At 1.61Mcps input rate, 1.09Mcps throughput was achieved. High-rate performances are, to our knowledge, the best ones for a Spectroscopy analog ASIC and are close to the ones achievable with standard DPPs. Therefore, TERA can represent an attractive detector pulse processing solution for high-density multichannel detection systems.
Spectroscopic Performance of TERA: Fast Multichannel Analog Pulse Processor ASIC for X-ray Detection Applications
Hafizh I.;Fabbrica E.;Carminati M.;Fiorini C.
2019-01-01
Abstract
This work reports the spectroscopic performance of the latest release of TERA (Throughput Enhanced Readout ASIC), a multichannel analog pulse processor (APP) ASIC suitable for detectors in ultra-high rate X-ray detection applications (>1Mcps/channel). The chip has been developed to process signals coming from Silicon Drift Detectors (SDDs) coupled with resettype Charge Sensitive Amplifiers (CSA). The demonstrator chip is composed of 4 parallel readout channels, each channel is composed by 7th-order semi-Gaussian shaping-amplifier with adjustable shaping times and dynamic range, followed by a peak stretcher and an analog memory. Each pair of channels can be optionally digitized by 12-bit on-chip ADC, providing the maximum sampling frequency up to 2.5MHz. TERA architecture enables to achieve simultaneously high throughput and satisfactory energy resolution. In 55Fe spectroscopy measurements using SDD collimated to 4mm diameter, at the shortest pulse width of 200ns, FWHM Mn-Ka line of 171.5eV and 205.1eV were obtained at input rate 10kcps and 1.61Mcps, respectively. At 1.61Mcps input rate, 1.09Mcps throughput was achieved. High-rate performances are, to our knowledge, the best ones for a Spectroscopy analog ASIC and are close to the ones achievable with standard DPPs. Therefore, TERA can represent an attractive detector pulse processing solution for high-density multichannel detection systems.File | Dimensione | Formato | |
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