In the context of integrated circuits (ICs) development, package electrical modeling is a fundamental task for die-package-board system optimization. On high-speed digital devices, Ball Grid Array (BGA) package platform is often the preferred choice thanks to its layout flexibility, and S-parameter modeling approach provides the most accurate broadband description of this kind of structure. Since package S-parameters have a very small variation range, they are highly sensitive to extraction inaccuracy due to intrinsic setup approximations, and this effect becomes stronger when the frequency increases. This paper is focused on a particular aspect of S-parameters extraction setup, that is the reference node definition for the ports applied in the extraction environment. Different methodologies are described, in the attempt to analyze and quantify their impact on the S-parameters. After a deep investigation regarding stand-alone package interconnections, effects on a complete system are evaluated.

Impact of Ports Reference Choice on S-Parameter Modeling of BGA Package Interconnections

Grassi F.
2020-01-01

Abstract

In the context of integrated circuits (ICs) development, package electrical modeling is a fundamental task for die-package-board system optimization. On high-speed digital devices, Ball Grid Array (BGA) package platform is often the preferred choice thanks to its layout flexibility, and S-parameter modeling approach provides the most accurate broadband description of this kind of structure. Since package S-parameters have a very small variation range, they are highly sensitive to extraction inaccuracy due to intrinsic setup approximations, and this effect becomes stronger when the frequency increases. This paper is focused on a particular aspect of S-parameters extraction setup, that is the reference node definition for the ports applied in the extraction environment. Different methodologies are described, in the attempt to analyze and quantify their impact on the S-parameters. After a deep investigation regarding stand-alone package interconnections, effects on a complete system are evaluated.
2020
SPI 2020 - 24th IEEE Workshop On Signal and Power Integrity, Proceedings
978-1-7281-4204-3
ELETTRICI
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/1170357
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