Electrical conductance of silicon photonic waveguides

Many optoelectronic devices embedded in a silicon photonic chip, like photodetectors, modulators and attenuators, rely on waveguide doping for their operation. However, the doping level of a waveguide is not always reflecting in an equal amount of free carriers available for conduction, because of the charges and trap energy states inevitably present at the Si/SiO2 interface. In a Silicon-On-Insulator technology with 10^15 cm-3 p-doped native waveguides this can lead to a complete depletion of the core from free carriers and to a consequent very high electrical resistance. This letter experimentally quantifies this effect and shows how the amount of free carriers in a waveguide can be modified and restored to the original doping value with a proper control of the chip substrate potential. A similar capability is also demonstrated by means of a specific metal gate integrated above the waveguide, that allows fine control of the conductance with high locality level. The paper highlights the linearity achievable in the conductance modulation, that can be exploited in a number of possible applications.