Scaling-up optical quantum technologies requires a combination of highly efficient multi-photon sources and integrated waveguide components. Here, we interface these scalable platforms, demonstrating high-rate three-photon interference with a quantum dot based multi-photon source and a reconfigurable photonic chip on glass. We actively demultiplex the temporal train of single photons obtained from a quantum emitter to generate a 3.8 × 103 s−1 three-photon source, which is then sent to the input of a tunable tritter circuit, demonstrating the on-chip quantum interference of three indistinguishable single photons. We show via pseudo number-resolving photon detection characterizing the output distribution that this first combination of scalable sources and reconfigurable photonic circuits compares favorably in performance with respect to previous implementations. Our detailed loss-budget shows that merging solid-state multi-photon sources and reconfigurable photonic chips could allow 10-photon experiments on chip at ∼40 s−1 rate in a foreseeable future.
Interfacing scalable photonic platforms: Solid-state based multi-photon interference in a reconfigurable glass chip
Crespi A.;Osellame R.;
2019-01-01
Abstract
Scaling-up optical quantum technologies requires a combination of highly efficient multi-photon sources and integrated waveguide components. Here, we interface these scalable platforms, demonstrating high-rate three-photon interference with a quantum dot based multi-photon source and a reconfigurable photonic chip on glass. We actively demultiplex the temporal train of single photons obtained from a quantum emitter to generate a 3.8 × 103 s−1 three-photon source, which is then sent to the input of a tunable tritter circuit, demonstrating the on-chip quantum interference of three indistinguishable single photons. We show via pseudo number-resolving photon detection characterizing the output distribution that this first combination of scalable sources and reconfigurable photonic circuits compares favorably in performance with respect to previous implementations. Our detailed loss-budget shows that merging solid-state multi-photon sources and reconfigurable photonic chips could allow 10-photon experiments on chip at ∼40 s−1 rate in a foreseeable future.File | Dimensione | Formato | |
---|---|---|---|
1905.00936.pdf
accesso aperto
:
Post-Print (DRAFT o Author’s Accepted Manuscript-AAM)
Dimensione
2.92 MB
Formato
Adobe PDF
|
2.92 MB | Adobe PDF | Visualizza/Apri |
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.