Current integrated circuits exhibit an impressive and in- creasing component density, hence an alarming power density. Future devices will require breakthroughs in hardware power dissipation strate- gies and software active thermal management to operate reliably and maximise performance. In this scenario, thermal modelling plays a key role in the design of next generation cooling and thermal management solutions. However, extending existing thermal models, or designing new ones to account for new cooling solutions, requires parameter identica- tion as well as a validation phase to ensure correctness of the results. In this paper, we propose a exible solution to the validation issue, in the form of a hardware platform based on a Thermal Test Chip (TTC). The proposed platform allows to test a heat dissipation solution under real- istic conditions, including fast spatial and temporal power gradients as well as hot spots, while collecting a temperature map of the active silicon layer. The combined power/temperature map is the key input to validate a thermal model, in both the steady state and transient case. This paper presents the current development of the platform, and provides a rst validation dataset for the case of a commercial heat sink.
|Titolo:||An Open-hardware Platform for MPSoC Thermal Modeling|
|Data di pubblicazione:||2019|
|Appare nelle tipologie:||04.1 Contributo in Atti di convegno|