This work presents TERA (Throughput Enhanced Readout ASIC), a multichannel low-noise readout ASIC designed for ultra-high-rate x-ray detection applications. The chip has been developed to process signals coming from Silicon Drift Detectors (SDDs) coupled to Charge Sensitive Amplifiers (CSAs), such as CUBE, with enhanced high throughput capability and good noise performance. The first prototype here presented is composed of four parallel readout channels, each one including a 7th order semi-Gaussian shaping-amplifier. The filter has been chosen to minimize series noise, ballistic deficit, and pile-up effect. The channel can accommodate four different energy ranges: 5, 10, 20, and 30 keV, and four different filter shaping times: 200, 400,1000, and 2000 ns (pulse width at 1% of the peak amplitude). The output of the shaping amplifier is followed by a peak stretcher and an analog memory. The analog memory serves as a buffer to temporarily store the peak values, thus increasing the throughput in Poisson-distributedevents with average count rate comparable to the acquisition readout frequency. An independentpeak detector circuit and a novel pileup-rejector strategy have also been developed to maximize the throughput. Readout channels are organized in two independent subsets of two channels, each one read sequentially, buffered by a single-ended-to-differential stage, and digitized by a successiveapproximation-register (SAR) 12-bit ADC, providing the maximum sampling rate for each channel of 2 Mcps. The simulations suggest that in the case of Poisson-distributed events with the average input count rate of 3 Mcps, the channel throughput can reach up to 1.75 Mcps.
TERA: A Readout IC for Ultra High Rate X-ray Detection Applications
Bellotti, Giovanni;Hafizh, Idham;Carminati, Marco;Fiorini, Carlo
2017-01-01
Abstract
This work presents TERA (Throughput Enhanced Readout ASIC), a multichannel low-noise readout ASIC designed for ultra-high-rate x-ray detection applications. The chip has been developed to process signals coming from Silicon Drift Detectors (SDDs) coupled to Charge Sensitive Amplifiers (CSAs), such as CUBE, with enhanced high throughput capability and good noise performance. The first prototype here presented is composed of four parallel readout channels, each one including a 7th order semi-Gaussian shaping-amplifier. The filter has been chosen to minimize series noise, ballistic deficit, and pile-up effect. The channel can accommodate four different energy ranges: 5, 10, 20, and 30 keV, and four different filter shaping times: 200, 400,1000, and 2000 ns (pulse width at 1% of the peak amplitude). The output of the shaping amplifier is followed by a peak stretcher and an analog memory. The analog memory serves as a buffer to temporarily store the peak values, thus increasing the throughput in Poisson-distributedevents with average count rate comparable to the acquisition readout frequency. An independentpeak detector circuit and a novel pileup-rejector strategy have also been developed to maximize the throughput. Readout channels are organized in two independent subsets of two channels, each one read sequentially, buffered by a single-ended-to-differential stage, and digitized by a successiveapproximation-register (SAR) 12-bit ADC, providing the maximum sampling rate for each channel of 2 Mcps. The simulations suggest that in the case of Poisson-distributed events with the average input count rate of 3 Mcps, the channel throughput can reach up to 1.75 Mcps.File | Dimensione | Formato | |
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