Dynamic estimation of thermal status information in embedded MPSoC architectures

Thermal-induced reliability issues are receiving an ever increasing attention in modern digital systems, due to the increasing power density profile. Multi-core architectures exploit a challenging thermal profile optimization problem, due to the presence of multiple cores in the same silicon die; as a matter of fact, the thermal coupling phenomenon worsens the estimation of the thermal status of each core, and thus the Dynamic Thermal Management process (DTM). The run-time estimation process can take full advantage of thermal coupling phenomena information and transient information, to help the Thermal Manager to avoid exceeding threshold temperature. The work presented in this paper aims at defining an on-line measurement methodology to provide the DTM subsystem with appropriate information on the thermal status of each core in a multi-core environment, in the context of temperature profile optimization in reliable-directed digital architectures and systems. Experimental results show that the proposed work overcomes classical models, whose estimate error can be up to 35% in inactive cores.