Impact of semiconducting electrodes on the electroresistance of ferroelectric tunnel junctions

Ferroelectric tunnel junctions are promising candidates for the realization of energy-efficient digital memories and analog memcomputing devices. In this work, we investigate the impact of a semiconducting layer in series to the junction on the sign of electroresistance. To this scope, we compare tunnel junctions fabricated out of Pt/BaTiO3/La1/3Sr2/3MnO3 (LSMO) and Pt/BaTiO3/Nb:SrTiO3 (Nb:STO) heterostructures, displaying an opposite sign of the electroresistance. By capacitance-voltage profiling, we observe a behavior typical of Metal-Oxide-Semiconductor tunnel devices in both cases but compatible with the opposite sign of charge carriers in the semiconducting layer. While Nb:STO displays the expected n-type semiconducting character, metallic LSMO develops an interfacial p-type semiconducting layer. The different types of carriers at the semiconducting interfaces and the modulation of the depleted region by the ferroelectric charge have a deep impact on electroresistance, possibly accounting for the different sign observed in the two systems.