The paper presents a system for measuring photon statistics and photon timing in the few-photon regime down to the single-photon level. The measurement system is based on superconducting nanowire single photon detectors and a time-to-digital converter implemented into a programmable device. The combination of these devices gives high performance to the system in terms of resolution and adaptability to the actual experimental conditions. As a case of application, we present the measurement of photon statistics for coherent light states. In this measurement, we make use of 8th order single photon correlations to reconstruct with high fidelity the statistics of a coherent state with average photon number up to 4. The processing is performed by means of a tapped-delay-line time-to-digital converter architecture that also hosts an asynchronous-correlated-digital-counter implemented in a field programmable gate array device and specifically designed for performance optimization in multi-channel usage.

Photon counting with photon number resolution through superconducting nanowires coupled to a multi-channel TDC in FPGA

LUSARDI, NICOLA;GERACI, ANGELO
2017-01-01

Abstract

The paper presents a system for measuring photon statistics and photon timing in the few-photon regime down to the single-photon level. The measurement system is based on superconducting nanowire single photon detectors and a time-to-digital converter implemented into a programmable device. The combination of these devices gives high performance to the system in terms of resolution and adaptability to the actual experimental conditions. As a case of application, we present the measurement of photon statistics for coherent light states. In this measurement, we make use of 8th order single photon correlations to reconstruct with high fidelity the statistics of a coherent state with average photon number up to 4. The processing is performed by means of a tapped-delay-line time-to-digital converter architecture that also hosts an asynchronous-correlated-digital-counter implemented in a field programmable gate array device and specifically designed for performance optimization in multi-channel usage.
2017
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/1034388
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