We propose a classical infrastructure for a quantum computer implemented in CMOS. The peculiarity of the approach is to operate the classical CMOS circuits and systems at deepcryogenic temperatures (cryoCMOS), so as to ensure physical proximity to the quantum bits, thus reducing thermal gradients and increasing compactness. CryoCMOS technology leverages the CMOS fabrication infrastructure and exploits the continuous effort of miniaturization that has sustained Moore's Law for over 50 years. Such approach is believed to enable the growth of the number of qubits operating in a fault-Tolerant fashion, paving the way to scalable quantum computing machines.

CryoCMOS hardware technology a classical infrastructure for a scalable quantum computer

FERRARI, GIORGIO;PRATI, ENRICO;
2016-01-01

Abstract

We propose a classical infrastructure for a quantum computer implemented in CMOS. The peculiarity of the approach is to operate the classical CMOS circuits and systems at deepcryogenic temperatures (cryoCMOS), so as to ensure physical proximity to the quantum bits, thus reducing thermal gradients and increasing compactness. CryoCMOS technology leverages the CMOS fabrication infrastructure and exploits the continuous effort of miniaturization that has sustained Moore's Law for over 50 years. Such approach is believed to enable the growth of the number of qubits operating in a fault-Tolerant fashion, paving the way to scalable quantum computing machines.
2016 ACM International Conference on Computing Frontiers - Proceedings
9781450341288
9781450341288
(de)coherence; CryoCMOS; cryogenics; errorcorrecting loop; fault-Tolerant computing; quantum computation; quantum micro-Architecture.; qubit; Software
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/1010062
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