INDIRLI, FABRIZIO

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					INDIRLI, FABRIZIO
				
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					DIPARTIMENTO DI ELETTRONICA, INFORMAZIONE E BIOINGEGNERIA
				
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A Tile-based Fused-layer CNN Accelerator for FPGAs

2020-01-01 Indirli, Fabrizio; Erdem, Ahmet; Silvano, Cristina

Accelerating Binary and Mixed-Precision NNs Inference on STMicroelectronics Embedded NPU with Digital In-Memory-Computing

2023-01-01 Indirli, Fabrizio; Siorpaes, David; Bosisio, Stefano; Vaghi, Alessandro; Desoli, Giuseppe; Ornstein, Andrea; Guarneri, Ivana; Chandna, Manav; Bhatia, Pratishtha; Suneja, Saumya; Singh, Surinder-pal; Chawla, Nitin; Ayodhyawasi, Manuj; Silvano, Cristina

Layer-wise Exploration of a Neural Processing Unit Compiler's Optimization Space

2024-01-01 Indirli, Fabrizio; Carlo Ornstein, Andrea; Desoli, Giuseppe; Buschini, Alessandro; Silvano, Cristina; Zaccaria, Vittorio

Titolo	Data di pubblicazione	Autori
A Tile-based Fused-layer CNN Accelerator for FPGAs	1-gen-2020	Indirli, FabrizioErdem, AhmetSilvano, Cristina
Accelerating Binary and Mixed-Precision NNs Inference on STMicroelectronics Embedded NPU with Digital In-Memory-Computing	1-gen-2023	Fabrizio IndirliDavid SiorpaesStefano BosisioAlessandro VaghiGiuseppe DesoliAndrea OrnsteinIvana GuarneriManav ChandnaPratishtha BhatiaSaumya SunejaSurinder-pal SinghNitin ChawlaManuj AyodhyawasiCristina Silvano + -
Layer-wise Exploration of a Neural Processing Unit Compiler's Optimization Space	1-gen-2024	Fabrizio IndirliAndrea Carlo OrnsteinGiuseppe DesoliAlessandro BuschiniCristina SilvanoVittorio Zaccaria + -

RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

INDIRLI, FABRIZIO

A Tile-based Fused-layer CNN Accelerator for FPGAs

Accelerating Binary and Mixed-Precision NNs Inference on STMicroelectronics Embedded NPU with Digital In-Memory-Computing

Layer-wise Exploration of a Neural Processing Unit Compiler's Optimization Space