Nome |
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An efficient tool for the assisted design of SAR ADCs capacitive DACs, file e0c31c08-e380-4599-e053-1705fe0aef77
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1.539
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High Scale-Factor Stability Frequency-Modulated MEMS Gyroscope: 3-Axis Sensor and Integrated Electronics Design, file e0c31c0b-d680-4599-e053-1705fe0aef77
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687
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A 70.7-dB SNDR 100-kS/s 14-b SAR ADC with attenuation capacitance calibration in 0.35-µm CMOS, file e0c31c11-11b3-4599-e053-1705fe0aef77
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431
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A 11-15 GHz CMOS /2 Frequency Divider For Broad-Band I/Q Generation, file e0c31c09-7fef-4599-e053-1705fe0aef77
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336
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A 6-fJ/conversion-step 200-kSps Asynchronous SAR ADC with Attenuation Capacitor in 130-nm CMOS adopting Standard MiM Capacitors, file e0c31c0d-cb21-4599-e053-1705fe0aef77
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288
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Fundamental Power Limits of SAR and ΔΣ Analog-to-Digital Converters, file e0c31c08-e580-4599-e053-1705fe0aef77
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264
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A 11-15 GHz CMOS ÷2 Frequency Divider For Broad-Band I/Q Generation, file e0c31c0a-3f60-4599-e053-1705fe0aef77
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144
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A Drift-Resilient Hardware Implementation of Neural Accelerators Based on Phase Change Memory Devices, file e0c31c12-0a69-4599-e053-1705fe0aef77
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127
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A Sub-400-nT/√Hz, 775-μW, Multi-Loop MEMS Magnetometer With Integrated Readout Electronics, file e0c31c0e-35d3-4599-e053-1705fe0aef77
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99
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A programmable closed-loop recording and stimulating wireless system for behaving small laboratory animals, file e0c31c08-1e58-4599-e053-1705fe0aef77
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92
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A New Implantable Closed-Loop Clinical Neural Interface: First Application in Parkinson’s Disease, file e0c31c11-e9e1-4599-e053-1705fe0aef77
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92
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A Multilayer Neural Accelerator With Binary Activations Based on Phase-Change Memory, file 2341c276-ed49-40a6-a8ee-792a62c73c0a
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26
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A Compact and Autoclavable System for Acute Extracellular Neural Recording and Brain Pressure Monitoring for Humans, file e0c31c0d-e0d9-4599-e053-1705fe0aef77
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20
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Efficient Behavioral Simulation of Charge-Pump Phase-Locked Loops, file e0c31c0b-a254-4599-e053-1705fe0aef77
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7
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A Sub-400-nT/√Hz, 775-μW, Multi-Loop MEMS Magnetometer With Integrated Readout Electronics, file e0c31c08-d803-4599-e053-1705fe0aef77
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5
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A Compact and Autoclavable System for Acute Extracellular Neural Recording and Brain Pressure Monitoring for Humans, file e0c31c08-1e59-4599-e053-1705fe0aef77
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4
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A Varactor Configuration Minimizing Flicker Noise Up-conversion in VCOs, file e0c31c08-2f1c-4599-e053-1705fe0aef77
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4
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An integrated low-noise multichannel system for neural signals amplification, file e0c31c08-3470-4599-e053-1705fe0aef77
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4
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A compact multichannel system for acquisition and processing of neural signals, file e0c31c08-3471-4599-e053-1705fe0aef77
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4
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Fully Integrated Systems for Neural Signal Recording: Technology Perspective and Low-Noise Front-End Design, file e0c31c09-c46b-4599-e053-1705fe0aef77
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4
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Fully Integrated, 406 μA, 5°/hr, Full Digital Output Lissajous Frequency-Modulated Gyroscope, file e0c31c0d-4898-4599-e053-1705fe0aef77
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4
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A Generalization of the Groszkowski’s Result in Differential Oscillator Topologies, file e0c31c11-1bac-4599-e053-1705fe0aef77
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4
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Bandwidth vs ZRO Stability Trade-Off in Lissajous Frequency Modulated MEMS Gyroscopes, file 326a0e01-fcb1-4733-8f66-03d7cac36b45
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3
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Sub-10 μHz/ √ Hz measurement instrumentation for 140-dB DR frequency-modulated MEMS sensors, file aa6d60fa-0090-4ce4-824a-f9865bc2d96f
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3
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A 6-fJ/conversion-step 200-kSps Asynchronous SAR ADC with Attenuation Capacitor in 130-nm CMOS adopting Standard MiM Capacitors, file e0c31c08-1c42-4599-e053-1705fe0aef77
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3
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A LOW-NOISE SUB-500uW LORENTZ FORCE BASED INTEGRATED MAGNETIC FIELD SENSING SYSTEM, file e0c31c08-2504-4599-e053-1705fe0aef77
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3
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A 2-GHz Differentially-Tuned VCO with Reduced Flicker Noise Up-Conversion, file e0c31c08-2db5-4599-e053-1705fe0aef77
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3
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A 70.7-dB SNDR 100-kS/s 14-b SAR ADC with attenuation capacitance calibration in 0.35-µm CMOS, file e0c31c0a-3b80-4599-e053-1705fe0aef77
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3
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A 10.2-ENOB, 150-MS/s redundant SAR ADC with a quasi-monotonic switching algorithm for time-interleaved converters, file 00c77365-1dcb-4f0d-a732-886efb41bd7e
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2
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Concurrent effect of redundancy and switching algorithms in SAR ADCs, file 1089a64e-001b-40d2-8394-318f0dcf4977
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2
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Frequency dependence on bias current in 5 GHz CMOS VCOs: impact on tuning range and flicker noise upconversion, file e0c31c07-ce7a-4599-e053-1705fe0aef77
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2
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A Multi-Channel Low-Power System-on-Chip for in vivo NeuralSpike Recording, file e0c31c07-e3e1-4599-e053-1705fe0aef77
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2
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Flicker Noise Up-Conversion due to Harmonic Distortion in Van der Pol CMOS Oscillators, file e0c31c07-ed03-4599-e053-1705fe0aef77
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2
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A wireless microsystem with digital data compression for neural spike recording, file e0c31c07-f3af-4599-e053-1705fe0aef77
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2
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General SSCR vs. cycle-to-cycle jitter relationship with application to the phase noise in PLL, file e0c31c08-29f9-4599-e053-1705fe0aef77
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2
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Automatic Amplitude Control Loop for a 2-V, 2.5-GHz LC-tank VCO, file e0c31c08-2ea7-4599-e053-1705fe0aef77
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2
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A Tool for the Assisted Design of Charge Redistribution SAR ADCs, file e0c31c08-3278-4599-e053-1705fe0aef77
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2
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A power-efficient analog integrated circuit for amplification and detection of neural signals, file e0c31c08-3ed5-4599-e053-1705fe0aef77
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2
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A 160 ua, 8 mdps/rt-Hz frequency-modulated MEMS yaw gyroscope, file e0c31c0b-2320-4599-e053-1705fe0aef77
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2
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The First Frequency-Modulated (FM) Pitch Gyroscope, file e0c31c0b-9513-4599-e053-1705fe0aef77
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2
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Efficient Behavioral Simulation of Charge-Pump Phase-Locked Loops, file e0c31c0b-c4e7-4599-e053-1705fe0aef77
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2
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Optimization of low-power oscillator topology for frequency modulated MEMS inertial sensors, file e0c31c0c-9bfd-4599-e053-1705fe0aef77
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2
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A low-noise high-speed comparator for a 12-bit 200-MSps SAR ADC in a 28-nm CMOS process, file e0c31c11-8372-4599-e053-1705fe0aef77
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2
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A 900-MS/s SAR-based Time-Interleaved ADC with a Fully Programmable Interleaving Factor and On-Chip Scalable Background Calibrations, file 0e47c3ec-5efd-49ea-ae15-6591f23d752b
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1
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Full-digital output ASIC for Lissajous Frequency Modulated MEMS Gyroscopes, file 96ee2cab-7be4-42e2-9fe3-a01d6ed7cb26
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1
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A varactor configuration minimizing the amplitude-to-phase noise conversion in VCOs, file e0c31c07-cc4f-4599-e053-1705fe0aef77
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1
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A 15-GHz Broad-Band ÷2 Frequency Divider in 0.13-µm CMOS Quadrature Generation., file e0c31c07-d3ef-4599-e053-1705fe0aef77
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1
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5-GHz Oscillator Array with Reduced Flicker Up-Conversion in 0.13-um CMOS, file e0c31c07-d657-4599-e053-1705fe0aef77
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1
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A DDS-Based PLL for 2.4-GHz Frequency Synthesis, file e0c31c07-d8fc-4599-e053-1705fe0aef77
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1
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Differentially-Tuned VCO with Reduced Tuning Sensitivity and Flicker Noise Up-Conversion, file e0c31c07-db64-4599-e053-1705fe0aef77
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1
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Efficient Calculation of the Impulse Sensitivity Function in Oscillators, file e0c31c07-fa55-4599-e053-1705fe0aef77
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1
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A fast and accurate simulation method of impulse sensitivity function in oscillators, file e0c31c07-fea1-4599-e053-1705fe0aef77
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1
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A Multi-Channel Low-Power System-on-Chip for in Vivo Recording and Wireless Transmission of Neural Spikes, file e0c31c08-07bd-4599-e053-1705fe0aef77
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1
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Suppression of Flicker Noise Up-Conversion in a 65-nm CMOS VCO in the 3.0-to-3.6 GHz Band, file e0c31c08-0b13-4599-e053-1705fe0aef77
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1
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Analysis and Minimization of Flicker Noise Up-Conversion in Voltage-Biased Oscillators, file e0c31c08-1054-4599-e053-1705fe0aef77
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1
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A wideband voltage-biased LC oscillator with reduced flicker noise up-conversion, file e0c31c08-10ed-4599-e053-1705fe0aef77
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1
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Simulating phase noise induced from cyclostationary noise sources, file e0c31c08-10f1-4599-e053-1705fe0aef77
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1
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Reducing flicker noise up-conversion in a 65nm CMOS VCO in the 1.6 to 2.6 GHz band, file e0c31c08-169b-4599-e053-1705fe0aef77
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1
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A simulation technique to compute phase noise induced from cyclostationary noise sources in RF oscillators, file e0c31c08-17af-4599-e053-1705fe0aef77
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1
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Impact of non-quasi-static effects on 1/f3 phase noise in a 1.9-to-2.6 GHz oscillator, file e0c31c08-1d66-4599-e053-1705fe0aef77
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1
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A Simulation and Modeling Environment for the Analysis and Design of Charge Redistribution DACs used in SAR ADCs, file e0c31c08-1e56-4599-e053-1705fe0aef77
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1
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Analysis and optimization of a SAR ADC with
Attenuation Capacitor, file e0c31c08-1e57-4599-e053-1705fe0aef77
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1
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Phase noise and accuracy in quadrature oscillators, file e0c31c08-2ae4-4599-e053-1705fe0aef77
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1
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A multi-tank LC-oscillator, file e0c31c08-2e29-4599-e053-1705fe0aef77
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1
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A voltage-controlled oscillator for IEEE 802.11a and HiperLAN2 application, file e0c31c08-2e96-4599-e053-1705fe0aef77
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1
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Differential Tuning Oscillators with Reduced Flicker Noise Upconversion, file e0c31c08-2fca-4599-e053-1705fe0aef77
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1
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A Multi-Channel Low-Power IC for Neural Spike Recording with Data Compression and Narrowband 400-MHz MC-FSK Wireless Transmission, file e0c31c08-440a-4599-e053-1705fe0aef77
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1
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A Multi-Channel Low-Power System-on-Chip for Single-Unit Recording and Narrowband Wireless Transmission of Neural Signal, file e0c31c08-440c-4599-e053-1705fe0aef77
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1
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An efficient linear-time variant simulation technique
of oscillator phase sensitivity function, file e0c31c08-449d-4599-e053-1705fe0aef77
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1
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A 64-Channel 965-μW Neural Recording SoC with UWB Wireless Transmission in 130-nm CMOS, file e0c31c10-c078-4599-e053-1705fe0aef77
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1
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On amplitude-gain-control optimization for Lissajous frequency modulated MEMS gyroscopes, file e0c31c12-0ad1-4599-e053-1705fe0aef77
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1
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Totale |
4.261 |