We present a “smart-pixel” suitable for implementation of monolithic single-photon imaging arrays aimed at 3D ranging applications by means of the direct time-of-flight detection (like LIDAR systems), but also for photon timing applications (like FLIM, FCS, FRET). The pixel includes a Single-Photon Avalanche Diode (SPAD) and a Time-to-Digital Converter (TDC) monolithically designed and manufactured in the same chip, and it is able to detect single photons and to measure in-pixel the time delay between a START signal (e.g. laser excitation, LIDAR flash) and a photon detection (e.g. back reflection from a target object). In order to provide both wide dynamic range, high time resolution and very high linearity, we devised a TDC architecture based on an interpolation technique. A “coarse” counter counts the number of reference-clock rising-edges between START and STOP, while high resolution is achieved by means of two interpolators, which measure the time elapsed between START (and STOP) signal and a successive clock edge. In an array with many pixels, multiple STOP channels are needed while just one START channel is necessary if the START event is common to all channels. We report on the design and characterization of prototype circuits, fabricated in a 0.35 μm standard CMOS technology containing complete conversion channels (i.e. 20-μm active-area diameter SPAD, quenching circuitry, and TDC). With a 100 MHz reference clock, the TDC provides a time resolution of 10 ps, a dynamic range of 160 ns and DNL < 1% LSB rms.

Smart-pixel for 3D ranging imagers based on single-photon avalanche diode and time-to-digital converter

MARKOVIC, BOJAN;TISA, SIMONE;TOSI, ALBERTO;ZAPPA, FRANCO
2011-01-01

Abstract

We present a “smart-pixel” suitable for implementation of monolithic single-photon imaging arrays aimed at 3D ranging applications by means of the direct time-of-flight detection (like LIDAR systems), but also for photon timing applications (like FLIM, FCS, FRET). The pixel includes a Single-Photon Avalanche Diode (SPAD) and a Time-to-Digital Converter (TDC) monolithically designed and manufactured in the same chip, and it is able to detect single photons and to measure in-pixel the time delay between a START signal (e.g. laser excitation, LIDAR flash) and a photon detection (e.g. back reflection from a target object). In order to provide both wide dynamic range, high time resolution and very high linearity, we devised a TDC architecture based on an interpolation technique. A “coarse” counter counts the number of reference-clock rising-edges between START and STOP, while high resolution is achieved by means of two interpolators, which measure the time elapsed between START (and STOP) signal and a successive clock edge. In an array with many pixels, multiple STOP channels are needed while just one START channel is necessary if the START event is common to all channels. We report on the design and characterization of prototype circuits, fabricated in a 0.35 μm standard CMOS technology containing complete conversion channels (i.e. 20-μm active-area diameter SPAD, quenching circuitry, and TDC). With a 100 MHz reference clock, the TDC provides a time resolution of 10 ps, a dynamic range of 160 ns and DNL < 1% LSB rms.
2011
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/600283
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