An IF-sampling technique rejects even-order alias channels. A 0.25 μm CMOS test chip demonstrates 27 dB anti-aliasing rejection, 70 dB dynamic range, and -121 dBm/Hz noise floor, for a 377 MHz IF GSM signal, with 52 MHz sampling rate.

A CMOS IF sampling circuit with reduced aliasing for wireless applications

LEVANTINO, SALVATORE;SAMORI, CARLO;
2002-01-01

Abstract

An IF-sampling technique rejects even-order alias channels. A 0.25 μm CMOS test chip demonstrates 27 dB anti-aliasing rejection, 70 dB dynamic range, and -121 dBm/Hz noise floor, for a 377 MHz IF GSM signal, with 52 MHz sampling rate.
2002
Digest of Technical Papers of IEEE International Solid-State Circuits Conference, 2002. ISSCC 2002
9780780373358
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/248219
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