Vectoring based on Tomlinson-Harashima Precoding (THP) has been proposed for downstream FEXT cancellation in G.fast DSL system. However, it suffers from the lack of scalability and latency accumulation due to nonlinear THP, especially for a large number of ports. In this paper, we propose a novel precoding technique based on a single DSL Access Multiplexer (DSLAM) that hosts multiple Vector Processors (VPs) to achieve parallel and scalable THP structure. Inter-VP signaling enables FEXT mitigation among the twisted pairs within the same vectored group (in-domain (ID) self-FEXT) as well as the FEXT among the different vectored groups (out-of-domain (OD) FEXT). In the proposed multi-VP FEXT mitigation technique, OD FEXT is minimized by linear processing based on Block Diagonalization, while conventional THP is used in parallel at each VP for ID self-FEXT cancellation. Numerical simulations using two different measured cables show that the proposed multi-VP THP attains the performance of the centralized THP, even for the practical near-far scenario.

Multi-vector Tomlinson-Harashima Precoding in G.fast downstream system

Naqvi, Syed Hassan Raza;Matera, Andrea;Spagnolini, Umberto
2016-01-01

Abstract

Vectoring based on Tomlinson-Harashima Precoding (THP) has been proposed for downstream FEXT cancellation in G.fast DSL system. However, it suffers from the lack of scalability and latency accumulation due to nonlinear THP, especially for a large number of ports. In this paper, we propose a novel precoding technique based on a single DSL Access Multiplexer (DSLAM) that hosts multiple Vector Processors (VPs) to achieve parallel and scalable THP structure. Inter-VP signaling enables FEXT mitigation among the twisted pairs within the same vectored group (in-domain (ID) self-FEXT) as well as the FEXT among the different vectored groups (out-of-domain (OD) FEXT). In the proposed multi-VP FEXT mitigation technique, OD FEXT is minimized by linear processing based on Block Diagonalization, while conventional THP is used in parallel at each VP for ID self-FEXT cancellation. Numerical simulations using two different measured cables show that the proposed multi-VP THP attains the performance of the centralized THP, even for the practical near-far scenario.
2016
2016 IEEE International Conference on Communication Systems, ICCS 2016
9781509034239
Distributed precoding; Multi Vector Processor (VP) THP; Scalable DSL system; Computer Networks and Communications; Hardware and Architecture
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/1045321
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