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Mostrati risultati da 101 a 150 di 185
Titolo Data di pubblicazione Autori File
An efficient linear-time variant simulation technique of oscillator phase sensitivity function 1-gen-2012 PEPE, FEDERICOBONFANTI, ANDREA GIOVANNILEVANTINO, SALVATOREMAFFEZZONI, PAOLOSAMORI, CARLOLACAITA, ANDREA LEONARDO
A Wideband Fractional-N PLL with Suppressed Charge-Pump Noise and Automatic Loop Filter Calibration 1-gen-2012 LEVANTINO, SALVATORETASCA, DAVIDEMARZIN, GIOVANNIZANUSO, MARCOSAMORI, CARLOLACAITA, ANDREA LEONARDO
A Glitch-Corrector Circuit for Low-Spur ADPLLs 1-gen-2012 ZANUSO, MARCOLEVANTINO, SALVATORESAMORI, CARLOLACAITA, ANDREA LEONARDO
20Mb/s Phase Modulator Based on a 3.6GHz Digital PLL with -36dB EVM at 5mW Power 1-gen-2012 MARZIN, GIOVANNILEVANTINO, SALVATORESAMORI, CARLOLACAITA, ANDREA LEONARDO
A 20 Mb/s Phase Modulator Based on a 3.6 GHz Digital PLL With -36 dB EVM at 5 mW Power 1-gen-2012 MARZIN, GIOVANNILEVANTINO, SALVATORESAMORI, CARLOLACAITA, ANDREA LEONARDO
Digital Fractional-N Frequency Synthesis 1-gen-2013 LEVANTINO, SALVATORESAMORI, CARLO
Simulating phase noise induced from cyclostationary noise sources 1-gen-2013 PEPE, FEDERICOBONFANTI, ANDREA GIOVANNILEVANTINO, SALVATOREMAFFEZZONI, PAOLOSAMORI, CARLOLACAITA, ANDREA LEONARDO
Suppression of Flicker Noise Up-Conversion in a 65-nm CMOS VCO in the 3.0-to-3.6 GHz Band 1-gen-2013 PEPE, FEDERICOBONFANTI, ANDREA GIOVANNILEVANTINO, SALVATORESAMORI, CARLOLACAITA, ANDREA LEONARDO
A simulation technique to compute phase noise induced from cyclostationary noise sources in RF oscillators 1-gen-2013 PEPE, FEDERICOBONFANTI, ANDREA GIOVANNILEVANTINO, SALVATOREMAFFEZZONI, PAOLOSAMORI, CARLOLACAITA, ANDREA LEONARDO
A wideband voltage-biased LC oscillator with reduced flicker noise up-conversion 1-gen-2013 PEPE, FEDERICOBONFANTI, ANDREA GIOVANNILEVANTINO, SALVATORESAMORI, CARLOLACAITA, ANDREA LEONARDO
Background adaptive linearization of high-speed digital-to-analog converters 1-gen-2013 FENAROLI, ANDREALEVANTINO, SALVATORESAMORI, CARLOLACAITA, ANDREA LEONARDO
Analysis and Minimization of Flicker Noise Up-Conversion in Voltage-Biased Oscillators 1-gen-2013 PEPE, FEDERICOBONFANTI, ANDREA GIOVANNILEVANTINO, SALVATORESAMORI, CARLOLACAITA, ANDREA LEONARDO
An efficient method to compute phase-noise in injection-locked frequency dividers 1-gen-2013 MARUCCI, GIOVANNILEVANTINO, SALVATOREMAFFEZZONI, PAOLOSAMORI, CARLO
Comparing techniques for spur reduction in digital bang-bang PLLs 1-gen-2013 MAFFEZZONI, PAOLOMARUCCI, GIOVANNILEVANTINO, SALVATORESAMORI, CARLO
Exploiting Stochastic Resonance to Enhance the Performance of Digital Bang-Bang PLLs 1-gen-2013 MARUCCI, GIOVANNILEVANTINO, SALVATOREMAFFEZZONI, PAOLOSAMORI, CARLO
Nonlinearity cancellation in digital PLLs (Invited paper) 1-gen-2013 LEVANTINO, SALVATORESAMORI, CARLO
A spur cancellation technique for MDLL-based frequency synthesizers 1-gen-2013 MARZIN, GIOVANNIFENAROLI, ANDREAMARUCCI, GIOVANNILEVANTINO, SALVATORESAMORI, CARLOLACAITA, ANDREA LEONARDO
A Wideband Fractional-N PLL With Suppressed Charge-Pump Noise and Automatic Loop Filter Calibration 1-gen-2013 LEVANTINO, SALVATOREMARZIN, GIOVANNISAMORI, CARLOLACAITA, ANDREA LEONARDO
Reducing flicker noise up-conversion in a 65nm CMOS VCO in the 1.6 to 2.6 GHz band 1-gen-2013 PEPE, FEDERICOBONFANTI, ANDREA GIOVANNILEVANTINO, SALVATORESAMORI, CARLOLACAITA, ANDREA LEONARDO
Minimum-jitter design of bang-bang PLLs in the presence of 1/f2 and 1/f3 DCO noise 1-gen-2013 MARUCCI, GIOVANNILEVANTINO, SALVATOREMAFFEZZONI, PAOLOSAMORI, CARLO
Introduction to the special issue on the 2014 IEEE international solid-state circuits conferences (ISSCC) 1-gen-2014 Carlo Samori +
A 1.7GHz MDLL-based fractional-N frequency synthesizer with 1.4ps RMS integrated jitter and 3mW power using a 1b TDC 1-gen-2014 MARUCCI, GIOVANNIFENAROLI, ANDREALEVANTINO, SALVATORESAMORI, CARLOLACAITA, ANDREA LEONARDO +
An Adaptive Pre-Distortion Technique to Mitigate the DTC Nonlinearity in Digital PLLs 1-gen-2014 LEVANTINO, SALVATOREMARZIN, GIOVANNISAMORI, CARLO
Analysis and Design of Low-Jitter Digital Bang-Bang Phase-Locked Loops 1-gen-2014 MARUCCI, GIOVANNILEVANTINO, SALVATOREMAFFEZZONI, PAOLOSAMORI, CARLO
My Two Years in Pavia 1-gen-2014 SAMORI, CARLO
A Background calibration technique to control bandwidth in digital PLLs 1-gen-2014 LEVANTINO, SALVATORESAMORI, CARLOLACAITA, ANDREA LEONARDO +
A 1.7 GHz Fractional-N Frequency Synthesizer Based on a Multiplying Delay-Locked Loop 1-gen-2015 LEVANTINO, SALVATORESAMORI, CARLOLACAITA, ANDREA LEONARDO +
All-Digital Phase-Locked Loops for Linear Wideband Phase Modulation 1-gen-2015 LEVANTINO, SALVATORESAMORI, CARLO +
Wideband chirp generation techniques in digital phase-locked loops 1-gen-2016 CHERNIAK, DMYTROLEVANTINO, SALVATORESAMORI, CARLO +
Understanding Phase Noise in LC VCOs: A Key Problem in RF Integrated Circuits 1-gen-2016 SAMORI, CARLO
Analysis of adaptive pre-distortion in DTC-based digital fractional-N PLLs 1-gen-2016 LEVANTINO, SALVATOREGRIMALDI, LUIGISAMORI, CARLO
Analysis of fractional-n bang-bang digital PLLs using phase switching technique 1-gen-2016 VO, TUAN MINHLEVANTINO, SALVATORESAMORI, CARLO
Analysis of power efficiency in high-performance class-B oscillators 1-gen-2016 BERTULESSI, LUCALEVANTINO, SALVATORESAMORI, CARLO
A novel segmentation scheme for DTC-based ΔΣ fractional-N PLL 1-gen-2017 VO, TUAN MINHSAMORI, CARLOLACAITA, ANDREA LEONARDOLEVANTINO, SALVATORE
Power-jitter trade-off analysis in digital-to-time converters 1-gen-2017 SANTICCIOLI, ALESSIOSAMORI, CARLOLACAITA, ANDREA LEONARDOLEVANTINO, SALVATORE
PLL-Based Wideband Frequency Modulator: Two-Point Injection Versus Pre-Emphasis Technique 1-gen-2017 Cherniak, DmytroSamori, CarloLevantino, Salvatore +
Analysis of millimeter-wave digital frequency modulators for ubiquitous sensors and radars 1-gen-2017 CHERNIAK, DMYTROLEVANTINO, SALVATORESAMORI, CARLO +
Low Power RF Digital PLLs with Direct Carrier Modulation 1-gen-2018 Salvatore LevantinoCarlo Samori
Adaptive Digital Pre-Emphasis for PLL-Based FMCW Modulators 1-gen-2018 Cherniak, DmytroGrimaldi, LuigiSamori, CarloLevantino, Salvatore
Impact of CMOS Scaling on Switched-Capacitor Power Amplifiers 1-gen-2018 TRUPPI, ALESSANDROSamori, CarloLacaita, Andrea L.Levantino, Salvatore +
A low-phase-noise digital bang-bang PLL with fast lock over a wide lock range 1-gen-2018 Bertulessi, LucaGrimaldi, LuigiCherniak, DmytroSamori, CarloLevantino, Salvatore
A 23GHz low-phase-noise digital bang-bang PLL for fast triangular and saw-tooth chirp modulation 1-gen-2018 Cherniak, DmytroGrimaldi, LuigiBertulessi, LucaSamori, CarloLevantino, Salvatore +
Digitally-Assisted Frequency Synthesizers for Fast Chirp Generation in mm-Wave radars 1-gen-2018 S. LevantinoC. Samori
A Novel LMS-Based Calibration Scheme for Fractional-N Digital PLLs 1-gen-2018 Vo, Tuan MinhSamori, CarloLevantino, Salvatore
A 15.6-18.2 GHz digital bang-bang PLL with -63dBc in-band fractional spur 1-gen-2018 Cherniak, DmytroGRIMALDI, LUIGIBASSI, MATTEOSamori, CarloLevantino, Salvatore +
A 23-GHz Low-Phase-Noise Digital Bang-Bang PLL for Fast Triangular and Sawtooth Chirp Modulation 1-gen-2018 Cherniak, DmytroGrimaldi, LuigiBertulessi, LucaSamori, CarloLevantino, Salvatore +
A Background Calibration Technique to Control the Bandwidth of Digital PLLs 1-gen-2018 MERCANDELLI, MARIOLuigi GrimaldiLuca BertulessiCarlo SamoriAndrea L. LacaitaSalvatore Levantino
A 30-GHz Digital Sub-Sampling Fractional-N PLL With -238.6-dB Jitter-Power Figure of Merit in 65-nm LP CMOS 1-gen-2019 Bertulessi, LucaKarman, SalehCherniak, DmytroGarghetti, AlessandroSamori, CarloLacaita, Andrea L.Levantino, Salvatore
16.7 A 30GHz Digital Sub-Sampling Fractional-N PLL with 198fs rms Jitter in 65nm LP CMOS 1-gen-2019 Grimaldi, LuigiBertulessi, LucaKarman, SalehSamori, CarloLacaita, Andrea L.Levantino, Salvatore +
Time-Variant Modeling and Analysis of Multiplying Delay-Locked Loops 1-gen-2019 Santiccioli, AlessioSamori, CarloLacaita, Andrea L.Levantino, Salvatore
Mostrati risultati da 101 a 150 di 185
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