RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

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Mostrati risultati da 1 a 50 di 174
Titolo Data di pubblicazione Autori File
Reduction of fault detection costs through testable design of sequential architectures with signal feedbacks 1-gen-1993 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Reduction of fault detection costs through a BDD formalism 1-gen-1994 FERRANDI, FABRIZIO
ALADIN: a multilevel testability analyzer for VLSI system design 1-gen-1994 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Towards WSI testable devices: an improved scan insertion technique 1-gen-1995 BOLCHINI, CRISTIANAFERRANDI, FABRIZIOSCIUTO, DONATELLA +
A Wafer Level Testability Approach Based on an Improved Scan Insertion Technique 1-gen-1995 BOLCHINI, CRISTIANAFERRANDI, FABRIZIOSCIUTO, DONATELLA +
Data-path testability analysis based on BDDs 1-gen-1995 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Symbolic optimization of FSM networks based on sequential ATPG techniques 1-gen-1996 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Testability analysis of pipelined data paths 1-gen-1996 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Implicit test sequences compaction for decreasing test application cost 1-gen-1996 FERRANDI, FABRIZIO +
Test generation for networks of interacting FSMs using symbolic techniques 1-gen-1996 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
BDD-based testability estimation of VHDL designs 1-gen-1996 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
How an ''evolving'' fault model improves the behavioral test generation 1-gen-1997 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Application of a testing framework to VHDL descriptions at different abstraction levels 1-gen-1997 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Property verification in the design of telecom applications 1-gen-1997 FERRANDI, FABRIZIO +
Configuration-specific test pattern extraction for field programmable gate arrays 1-gen-1997 FERRANDI, FABRIZIO +
Testing Core-based Digital Systems: a Symbolic Methodology 1-gen-1997 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits 1-gen-1998 FERRANDI, FABRIZIO +
Implicit test generation for behavioral VHDL models 1-gen-1998 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Power estimation of behavioral descriptions 1-gen-1998 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
VHDL testability analysis based on fault clustering and implicit fault injection 1-gen-1998 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Automatic VHDL restructuring for RTL synthesis optimization and testability improvement 1-gen-1998 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Increase the behavioral fault model accuracy using high-level synthesis information 1-gen-1999 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Symbolic functional vector generation for VHDL specifications 1-gen-1999 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Testability Alternatives Exploration through Functional Testing 1-gen-2000 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
BIST Architectures Selection Based on Behavioral Testing 1-gen-2000 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
An Efficient Heuristic Approach to Solve the Unate Covering Problem 1-gen-2000 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Symbolic optimization of interacting controllers based on redundancy identification and removal 1-gen-2000 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
An Approach to Functional Testing of VLIW Architectures 1-gen-2000 BRUSCHI, FRANCESCOFERRANDI, FABRIZIOSCIUTO, DONATELLA +
An Application of Genetic Algorithms and BDDs to Functional Testing 1-gen-2000 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Requirements for synthesis-oriented modeling in SystemC 1-gen-2001 FERRANDI, FABRIZIO +
Semiconcurrent error detection in data paths 1-gen-2001 ANTOLA, ANNA MARIAFERRANDI, FABRIZIOSAMI, MARIAGIOVANNA +
Functional Test Generation for Behaviorally Sequential Models 1-gen-2001 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
An Efficient Heuristic Approach to Solve the Unate Covering Problem 1-gen-2001 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Test Generation and Testability Alternatives Exploration of Critical Algorithms for Embedded Applications 1-gen-2002 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Error simulation based on the SystemC design description language 1-gen-2002 BRUSCHI, FRANCESCOFERRANDI, FABRIZIOSCIUTO, DONATELLA +
Behavioral test generation for the selection of BIST logic 1-gen-2002 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Functional verification for SystemC descriptions using constraint solving 1-gen-2002 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Identification of Design Errors through Functional Testing 1-gen-2003 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Functional Test Generation 1-gen-2003 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Synthesis of complex control structures from behavioral SystemC models 1-gen-2003 BRUSCHI, FRANCESCOFERRANDI, FABRIZIO
Mining Interesting Patterns from Hardware-Software Codesign Data with the Learning Classifier System XCS 1-gen-2003 FERRANDI, FABRIZIOLANZI, PIER LUCASCIUTO, DONATELLA
System Level Hardware--Software Design Exploration with XCS 1-gen-2004 FERRANDI, FABRIZIOLANZI, PIER LUCASCIUTO, DONATELLA
System-level metrics for hardware/software architectural mapping 1-gen-2004 FERRANDI, FABRIZIOLANZI, PIER LUCASCIUTO, DONATELLATANELLI, MARA
Exploiting partial dynamic reconfiguration for SoC design of complex application on FPGA platforms 1-gen-2005 FERRANDI, FABRIZIOREDAELLI, MASSIMOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Solving the Coloring Problem to Schedule on Partially Dynamically Reconfigurable Hardware 1-gen-2005 FERRANDI, FABRIZIOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Operating system support for dynamically reconfigurable SoC architectures 1-gen-2005 FERRANDI, FABRIZIOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
A Framework for the Functional Verification of SystemC Models 1-gen-2005 BRUSCHI, FRANCESCOFERRANDI, FABRIZIOSCIUTO, DONATELLA
Caronte: a complete methodology to implement partially dynamically self-reconfiguring embedded systems on modern FPGA 1-gen-2005 FERRANDI, FABRIZIOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
A Design Methodology for Dynamic Reconfiguration: The Caronte Architecture 1-gen-2005 FERRANDI, FABRIZIOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA
SyCERS: a SystemC design exploration framework for SoC reconfigurable architecture 1-gen-2006 FERRANDI, FABRIZIOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Mostrati risultati da 1 a 50 di 174
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