Sfoglia per Autore
Analysis of power efficiency in high-performance class-B oscillators
2016-01-01 Bertulessi, Luca; Levantino, Salvatore; Samori, Carlo
Analysis of fractional-n bang-bang digital PLLs using phase switching technique
2016-01-01 Vo, TUAN MINH; Levantino, Salvatore; Samori, Carlo
Introduction to the Special Section on the 2015 Radio Frequency Integrated Circuits Symposium
2016-01-01 Levantino, Salvatore
Wideband chirp generation techniques in digital phase-locked loops
2016-01-01 Cherniak, Dmytro; Levantino, Salvatore; Samori, Carlo; Nonis, R.
Analysis of adaptive pre-distortion in DTC-based digital fractional-N PLLs
2016-01-01 Levantino, Salvatore; Grimaldi, Luigi; Samori, Carlo
Digital frequency synthesizer with robust injection locked divider
2017-01-01 Cherniak, Dmytro; Levantino, Salvatore; Tiebout, Marc; Nonis, Roberto
Analysis of millimeter-wave digital frequency modulators for ubiquitous sensors and radars
2017-01-01 Cherniak, Dmytro; Levantino, Salvatore; Samori, Carlo; Nonis, Roberto
PLL-Based Wideband Frequency Modulator: Two-Point Injection Versus Pre-Emphasis Technique
2017-01-01 Cherniak, Dmytro; Samori, Carlo; Nonis, Roberto; Levantino, Salvatore
Power-jitter trade-off analysis in digital-to-time converters
2017-01-01 Santiccioli, Alessio; Samori, Carlo; Lacaita, ANDREA LEONARDO; Levantino, Salvatore
A novel segmentation scheme for DTC-based ΔΣ fractional-N PLL
2017-01-01 Vo, TUAN MINH; Samori, Carlo; Lacaita, ANDREA LEONARDO; Levantino, Salvatore
Efficient Behavioral Simulation of Charge-Pump Phase-Locked Loops
2017-01-01 Leoncini, Mauro; Bonfanti, ANDREA GIOVANNI; Levantino, Salvatore; Lacaita, ANDREA LEONARDO
Low Power RF Digital PLLs with Direct Carrier Modulation
2018-01-01 Levantino, Salvatore; Samori, Carlo
Digital phase-locked loops
2018-01-01 Levantino, Salvatore
A Novel LMS-Based Calibration Scheme for Fractional-N Digital PLLs
2018-01-01 Vo, TUAN MINH; Samori, Carlo; Levantino, Salvatore
A Low-Power and Wide-Locking-Range Injection-Locked Frequency Divider by Three with Dual-Injection Divide-by-Two Technique
2018-01-01 Garghetti, Alessandro; Lacaita, Andrea L.; Levantino, Salvatore
A low-phase-noise digital bang-bang PLL with fast lock over a wide lock range
2018-01-01 Bertulessi, Luca; Grimaldi, Luigi; Cherniak, Dmytro; Samori, Carlo; Levantino, Salvatore
Digitally-Assisted Frequency Synthesizers for Fast Chirp Generation in mm-Wave radars
2018-01-01 Levantino, S.; Samori, C.
A 15.6-18.2 GHz digital bang-bang PLL with -63dBc in-band fractional spur
2018-01-01 Cherniak, Dmytro; Grimaldi, Luigi; Padovan, Fabio; Bassi, Matteo; Nonis, Roberto; Samori, Carlo; Levantino, Salvatore
A 23-GHz Low-Phase-Noise Digital Bang-Bang PLL for Fast Triangular and Sawtooth Chirp Modulation
2018-01-01 Cherniak, Dmytro; Grimaldi, Luigi; Bertulessi, Luca; Nonis, Roberto; Samori, Carlo; Levantino, Salvatore
Schaltung mit Oszillatoren, Phasenregelkreis-Schaltung und Verfahren
2018-01-01 Levantino, S.; Cherniak, D.
A Novel Single-Inductor Injection-Locked Frequency Divider by Three With Dual-Injection Secondary Locking
2018-01-01 Garghetti, Alessandro; Lacaita, Andrea L.; Levantino, Salvatore
A 23GHz low-phase-noise digital bang-bang PLL for fast triangular and saw-tooth chirp modulation
2018-01-01 Cherniak, Dmytro; Grimaldi, Luigi; Bertulessi, Luca; Samori, Carlo; Nonis, Roberto; Levantino, Salvatore
A Background Calibration Technique to Control the Bandwidth of Digital PLLs
2018-01-01 Mercandelli, Mario; Grimaldi, Luigi; Bertulessi, Luca; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore
A Single-Inductor Two-Step-Mixing Injection-Locked Frequency Divider by Four with Concurrent Tail-Injection
2018-01-01 Garghetti, Alessandro; Lacaita, Andrea L.; Levantino, Salvatore
Variation-aware Modeling of Integrated Capacitors based on Floating Random Walk Extraction
2018-01-01 Maffezzoni, Paolo; Zhang, Zheng; Levantino, Salvatore; Daniel, Luca
Impact of CMOS Scaling on Switched-Capacitor Power Amplifiers
2018-01-01 Truppi, Alessandro; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore; Ronchi, Marco; Sosio, Marco
Adaptive Digital Pre-Emphasis for PLL-Based FMCW Modulators
2018-01-01 Cherniak, Dmytro; Grimaldi, Luigi; Samori, Carlo; Levantino, Salvatore
16.7 A 30GHz Digital Sub-Sampling Fractional-N PLL with 198fs rms Jitter in 65nm LP CMOS
2019-01-01 Grimaldi, Luigi; Bertulessi, Luca; Karman, Saleh; Cherniak, Dmytro; Garghetti, Alessandro; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore
Time-Variant Modeling and Analysis of Multiplying Delay-Locked Loops
2019-01-01 Santiccioli, Alessio; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore
A 1.6-to-3.0-GHz Fractional-N MDLL with a Digital-to-Time Converter Range-Reduction Technique Achieving 397fs Jitter at 2.5-mW Power
2019-01-01 Santiccioli, A.; Mercandelli, M.; Lacaita, A. L.; Samori, C.; Levantino, S.
RADAR SIGNAL MODULATOR WITH BANDWIDTH COMPENSATION AND FREQUENCY OFFSET SEQUENCE
2019-01-01 Levantino, S.; Mercandelli, M.; Cherniak, D.
A 30-GHz Digital Sub-Sampling Fractional-N PLL With -238.6-dB Jitter-Power Figure of Merit in 65-nm LP CMOS
2019-01-01 Bertulessi, Luca; Karman, Saleh; Cherniak, Dmytro; Garghetti, Alessandro; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore
Digitally-Intensive Fast Frequency Modulators for FMCW Radars in CMOS: (Invited Paper)
2019-01-01 Cherniak, D.; Samori, C.; Levantino, S.
A 1.6-to-3.0-GHz Fractional-N MDLL With a Digital-to-Time Converter Range-Reduction Technique Achieving 397-fs Jitter at 2.5-mW Power
2019-01-01 Santiccioli, Alessio; Mercandelli, Mario; Lacaita, Andrea L.; Samori, Carlo; Levantino, Salvatore
Chirp Generators for Millimeter-Wave FMCW Radars
2020-01-01 Cherniak, D.; Levantino, S.
A 66fsrmsJitter 12.8-to-15.2GHz Fractional-N Bang-Bang PLL with Digital Frequency-Error Recovery for Fast Locking
2020-01-01 Santiccioli, A.; Mercandelli, M.; Bertulessi, L.; Parisi, A.; Cherniak, D.; Lacaita, A. L.; Samori, C.; Levantino, S.
Design issues and performance analysis of CCM boost converters with RHP zero mitigation via inductor current sensing
2020-01-01 Leoncini, M.; Levantino, S.; Ghioni, M.
A 66-fs-rms Jitter 12.8-to-15.2-GHz Fractional-N Bang-Bang PLL With Digital Frequency-Error Recovery for Fast Locking
2020-01-01 Santiccioli, Alessio; Mercandelli, Mario; Bertulessi, Luca; Parisi, Angelo; Cherniak, Dmytro; Lacaita, Andrea L.; Samori, Carlo; Levantino, Salvatore
A Novel Start-Up Technique for Time-Based Boost Converters with Seamless PFM/PWM Transition
2020-01-01 Rosa, Tommaso; Leoncini, Mauro; Ghioni, Massimo; Levantino, Salvatore
Bang-bang digital PLLs for wireless systems
2020-01-01 Levantino, S.; Samori, C.
A 250Mb/s Direct Phase Modulator with -42.4dB EVM Based on a 14GHz Digital PLL
2020-01-01 Cherniak, Dmytro; Mercandelli, Mario; Bertulessi, Luca; Padovan, Fabio; Grimaldi, Luigi; Santiccioli, Alessio; Aichner, Michael; Samori, Carlo; Levantino, Salvatore
Jitter Minimization in Digital PLLs with Mid-Rise TDCs
2020-01-01 Avallone, L.; Kennedy, M. P.; Karman, S.; Samori, C.; Levantino, S.
A 12.5GHz Fractional-N Type-I Sampling PLL Achieving 58fs Integrated Jitter
2020-01-01 Mercandelli, M.; Santiccioli, A.; Parisi, A.; Bertulessi, L.; Cherniak, D.; Lacaita, A. L.; Samori, C.; Levantino, S.
Low-Phase-Noise PLL via Reference Path Coupling
2021-01-01 Cherniak, D.; Levantino, S.; Santiccioli, A.
CONVERTITORE SWITCHED-CAPACITOR, PROCEDIMENTO, SISTEMA DI ALIMENTAZIONE E DISPOSITIVO ELETTRONICO CORRISPONDENTI
2021-01-01 Zambetti, O. E.; Gasparini, A.; Dago, A.; Levantino, S.; Ghioni, M. A.
PROCEDIMENTO PER IL CONTROLLO DI UN CONVERTITORE DC-DC SINGLE INPUT DUAL OUTPUT, CORRISPONDENTE CONVERTITORE E PRODOTTO INFORMATICO
2021-01-01 Luise, C.; Ghioni, M.; Levantino, S.; Leoncini, M.; Cattani, A.; Gasparini, A.
Convertitore DC-DC con anello di controllo basato sul tempo e corrispondente procedimento
2021-01-01 Bertolini, A.; Ghioni, M.; Gasparini, A.; Levantino, S.; Leoncini, M.
A 18.9-22.3GHz Dual-Core Digital PLL with On-Chip Power Combination for Phase Noise and Power Scalability
2021-01-01 Karman, S.; Tesolin, F.; Dago, A.; Mercandelli, M.; Samori, C.; Levantino, S.
A Novel Topology of Coupled Phase-Locked Loops
2021-01-01 Karman, Saleh; Tesolin, Francesco; Levantino, Salvatore; Samori, Carlo
32.8 A 98.4fs-Jitter 12.9-to-15.1GHz PLL-Based LO Phase-Shifting System with Digital Background Phase-Offset Correction for Integrated Phased Arrays
2021-01-01 Santiccioli, A.; Mercandelli, M.; Dartizio, S. M.; Tesolin, F.; Karman, S.; Shehata, A.; Bertulessi, L.; Buccoleri, F.; Avallone, L.; Parisi, A.; Cherniak, D.; Lacaita, A. L.; Kennedy, M. P.; Samori, C.; Levantino, S.
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