Sfoglia per Autore
A FPGA coprocessor for the cryptographic Tate pairing over Fp
2008-01-01 Barenghi, Alessandro; Bertoni, G.; Breveglieri, LUCA ODDONE; Pelosi, Gerardo
Low Voltage Fault Attacks on the RSA Cryptosystem
2009-01-01 Barenghi, Alessandro; G., Bertoni; E., Parrinello; Pelosi, Gerardo
Fast Disk Encryption Through GPGPU Acceleration
2009-01-01 Agosta, Giovanni; Barenghi, Alessandro; A., Di Biagio; F., De Santis; Pelosi, Gerardo
Design of a Parallel AES for Graphics Hardware using the CUDA framework
2009-01-01 A., Di Biagio; Barenghi, Alessandro; Pelosi, Gerardo; Agosta, Giovanni
Improving first order differential power attacks through Digital Signal Processing
2010-01-01 Barenghi, Alessandro; Pelosi, Gerardo; Y., Teglia
Low voltage fault attacks to AES
2010-01-01 Barenghi, Alessandro; G., Bertoni; Breveglieri, LUCA ODDONE; M., Pellicioli; Pelosi, Gerardo
Fault attack on AES with single-bit induced faults
2010-01-01 Barenghi, Alessandro; G., Bertoni; Breveglieri, LUCA ODDONE; M., Pellicioli; Pelosi, Gerardo
Countermeasures against fault attacks on software implemented AES: effectiveness and cost
2010-01-01 Barenghi, Alessandro; Breveglieri, LUCA ODDONE; I., Koren; Pelosi, Gerardo; F., Regazzoni
Record Setting Software Implementation of DES Using CUDA
2010-01-01 Agosta, Giovanni; Barenghi, Alessandro; F., De Santis; Pelosi, Gerardo
On the efficiency of design time evaluation of the resistance to power attacks
2011-01-01 Barenghi, Alessandro; G. M., Bertoni; F., De Santis; F., Melzani
Security and Privacy in Smart Grid Infrastructures
2011-01-01 Barenghi, Alessandro; Pelosi, Gerardo
A novel fault attack against ECDSA
2011-01-01 Barenghi, Alessandro; G., Bertoni; A., Palomba; R., Susella
Information Leakage Discovery Techniques to Enhance Secure Chip Design
2011-01-01 Barenghi, Alessandro; Pelosi, Gerardo; Y., Teglia
On the Vulnerability of FPGA Bitstream Encryption against Power Analysis Attacks - Extracting Keys from Xilinx Virtex-II FPGAs
2011-01-01 A., Moradi; Barenghi, Alessandro; T., Kasper; C., Paar
Exploring the Feasibility of Low Cost Fault Injection Attacks on Sub-Threshold Devices through an example of a 65nm AES implementation
2011-01-01 Barenghi, Alessandro; C., Hocquet; D., Bol; F. X., Standaert; F., Regazzoni; I., Koren
Fault attack to the elliptic curve digital signature algorithm with multiple bit faults
2011-01-01 Barenghi, Alessandro; G., Bertoni; Breveglieri, LUCA ODDONE; A., Palomba; Pelosi, Gerardo
Smart metering in power grids: Application scenarios and security
2011-01-01 Barenghi, Alessandro; Breveglieri, LUCA ODDONE; Fugini, Mariagrazia; Pelosi, Gerardo
Simulation-Time Security Margin Assessment against Power-Based Side Channel Attacks
2012-01-01 Barenghi, Alessandro; Pelosi, Gerardo; F., Regazzoni
A Code Morphing Methodology to Automate Power Analysis Countermeasures
2012-01-01 Agosta, Giovanni; Barenghi, Alessandro; Pelosi, Gerardo
Fault injection attacks on cryptographic devices: theory, practice, and countermeasures
2012-01-01 Barenghi, Alessandro; Breveglieri, LUCA ODDONE; I., Koren; D., Naccache
Automated Security Analysis of Dynamic Web Applications through Symbolic Code Execution
2012-01-01 Agosta, Giovanni; Barenghi, Alessandro; A., Parata; Pelosi, Gerardo
Smart Meters and Home Gateway Scenarios
2012-01-01 Barenghi, Alessandro; Breveglieri, LUCA ODDONE; Fugini, Mariagrazia; Pelosi, Gerardo
Injection Technologies for Fault Attacks on Microprocessors
2012-01-01 Barenghi, Alessandro; G. M., Bertoni; Breveglieri, LUCA ODDONE; M., Pellicioli; Pelosi, Gerardo
Exploiting Bit-level Parallelism in GPGPUs: a Case Study on KEELOQ Exhaustive Key Search Attack
2012-01-01 Agosta, Giovanni; Barenghi, Alessandro; Pelosi, Gerardo
Secure and Efficient Design of Block Cipher Implementations on Microcontrollers
2013-01-01 Barenghi, Alessandro; Pelosi, Gerardo; Terraneo, Federico
Enhancing Passive Side-Channel Attack Resilience through Schedulability Analysis of Data-Dependency Graphs
2013-01-01 Agosta, Giovanni; Barenghi, Alessandro; Pelosi, Gerardo; Scandale, Michele
Drop-In Control Flow Hijacking Prevention through Dynamic Library Interception
2013-01-01 Barenghi, Alessandro; Pelosi, Gerardo; F., Pozzi
PAPAGENO: A Parallel Parser Generator for Operator Precedence Grammars
2013-01-01 Barenghi, Alessandro; Ermes, Viviani; CRESPI REGHIZZI, Stefano; Mandrioli, Dino; Pradella, Matteo
Design Time Engineering of Side Channel Resistant Cipher Implementations
2013-01-01 Barenghi, Alessandro; Breveglieri, LUCA ODDONE; F., De Santis; F., Melzani; Palomba, Andrea; Pelosi, Gerardo
Compiler-based Side Channel Vulnerability Analysis and Optimized Countermeasures Application
2013-01-01 Agosta, Giovanni; Barenghi, Alessandro; M., Maggi; Pelosi, Gerardo
Parallel parsing of operator precedence grammars
2013-01-01 Barenghi, Alessandro; CRESPI REGHIZZI, Stefano; Mandrioli, Dino; Pradella, Matteo
Security Analysis of Building Automation Networks: Threat Model and Viable Mitigation Techniques
2013-01-01 Antonini, Alessio; Barenghi, Alessandro; Pelosi, Gerardo
A Fault Induction Technique Based on Voltage Underfeeding with Application to Attacks against AES and RSA
2013-01-01 Barenghi, Alessandro; G., Bertoni; Breveglieri, LUCA ODDONE; Pelosi, Gerardo
Extending the Design Space for Secure Embedded System Design
2014-01-01 Agosta, Giovanni; Barenghi, Alessandro; M., Maggi; Pelosi, Gerardo
Symmetric key encryption acceleration on heterogeneous many-core architectures
2014-01-01 Agosta, Giovanni; Barenghi, Alessandro; Pelosi, Gerardo; Scandale, Michele
Snake: an End-to-End Encrypted Online Social Network
2014-01-01 Barenghi, Alessandro; M., Beretta; DI FEDERICO, Alessandro; Pelosi, Gerardo
Security Challenges in Building Automation and SCADA
2014-01-01 Antonini, Alessio; Barenghi, Alessandro; Pelosi, Gerardo; S., Zonouz
The PAPAGENO Parallel-Parser Generator
2014-01-01 Barenghi, Alessandro; CRESPI REGHIZZI, Stefano; Mandrioli, Dino; Panella, Federica; Pradella, Matteo
Towards transparently tackling functionality and performance issues across different OpenCL platforms
2014-01-01 Agosta, Giovanni; Barenghi, Alessandro; Pelosi, Gerardo; Scandale, Michele
A Multiple Equivalent Execution Trace Approach to Secure Cryptographic Embedded Software
2014-01-01 Agosta, Giovanni; Barenghi, Alessandro; Pelosi, Gerardo; Scandale, Michele
A combined design-time/test-time study of the vulnerability of sub-threshold devices to low voltage fault attacks
2014-01-01 Barenghi, Alessandro; Hocquet, Cedric; Bol, David; Standaert, Francois Xaviermsc; Regazzoni, Francesco; Koren, Israel
On the Security of Partially Masked Software Implementations
2014-01-01 Barenghi, Alessandro; Pelosi, Gerardo
Differential Fault Analysis for Block Ciphers: an Automated Conservative Analysis
2014-01-01 Agosta, Giovanni; Barenghi, Alessandro; Pelosi, Gerardo; Scandale, Michele
Securing Software Cryptographic Primitives for Embedded Systems against Side Channel Attacks
2014-01-01 Agosta, Giovanni; Barenghi, Alessandro; Pelosi, Gerardo
Design Space Extension for Secure Implementation of Block Ciphers
2014-01-01 Agosta, Giovanni; Barenghi, Alessandro; M., Maggi; Pelosi, Gerardo
Fault Sensitivity Analysis at Design Time
2015-01-01 Barenghi, Alessandro; Breveglieri, LUCA ODDONE; Palomba, Andrea; Pelosi, Gerardo
Foreword - Proceedings of the Second Workshop on Cryptography and Security in Computing Systems
2015-01-01 Pelosi, Gerardo; Koren, Israel; Agosta, Giovanni; Barenghi, Alessandro
Computer Security Anchors in Smart Grids: The Smart Metering Scenario and Challenges
2015-01-01 Barenghi, Alessandro; Breveglieri, LUCA ODDONE; Fugini, Mariagrazia; Pelosi, Gerardo
Trace-based Schedulability Analysis to Enhance Passive Side-Channel Attack Resilience of Embedded Software
2015-01-01 Agosta, Giovanni; Barenghi, Alessandro; Pelosi, Gerardo; Scandale, Michele
Challenging the Trustworthiness of PGP: Is the Web-of-Trust Tear-Proof?
2015-01-01 Barenghi, Alessandro; DI FEDERICO, Alessandro; Pelosi, Gerardo; Sanfilippo, Stefano
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