Sfoglia per Autore  

Opzioni
Mostrati risultati da 1 a 50 di 484
Titolo Data di pubblicazione Autori File
A Bird’s Eye View on Quantum Computing: Current and Future Trends 1-gen-2023 Beatrice BranchiniDavide ConficconiFrancesco PeverelliDonatella SciutoMarco D. Santambrogio
On the Design and Characterization of Set Packing Problem on Quantum Annealers 1-gen-2023 Marco VenereGiuseppe SorrentinoBeatrice BranchiniDavide ConficconiElisabetta Di NittoDonatella SciutoMarco D. Santambrogio
The Hitchhiker's Guide to FPGA-Accelerated Quantum Error Correction 1-gen-2023 B. BranchiniD. ConficconiD. SciutoM. D. Santambrogio
A Decentralized Approach to Award Game Achievements 1-gen-2023 Francesco BruschiDonatella SciutoTommaso Paulon +
Iris: Automatic Generation of Efficient Data Layouts for High Bandwidth Utilization 1-gen-2023 Soldavini S.Sciuto D.Pilato C.
Optimizing the Use of Behavioral Locking for High-Level Synthesis 1-gen-2023 Pilato C.Collini L.Cassano L.Sciuto D. +
Faber: a Hardware/Software Toolchain for Image Registration 1-gen-2023 D'Arnese, EleonoraConficconi, DavideSozzo, Emanuele DelSciuto, DonatellaSantambrogio, Marco D. +
Invited: High-level design methods for hardware security: Is it the right choice? 1-gen-2022 Pilato C.Sciuto D. +
Pushing the Level of Abstraction of Digital System Design: a Survey on How to Program FPGAs 1-gen-2022 Emanuele Del SozzoDavide ConficconiAlberto ZeniMirko SalarisDonatella SciutoMarco D. Santambrogio
On the Automation of Radiomics-Based Identification and Characterization of NSCLC 1-gen-2022 D'Arnese, EleonoraDonato, Guido Walter DiSozzo, Emanuele DelSciuto, DonatellaSantambrogio, Marco Domenico +
A scalable decentralized system for fair token distribution and seamless users onboarding 1-gen-2022 Francesco BruschiDonatella Sciuto +
Reconfigurable Architectures: The Shift from General Systems to Domain Specific Solutions 1-gen-2022 Eleonora D'ArneseDavide ConficconiMarco Domenico SantambrogioDonatella Sciuto
Protecting Hardware IP Cores During High-Level Synthesis 1-gen-2022 Pilato, ChristianSciuto, Donatella +
Tunneling Trust into the Blockchain: A Merkle Based Proof System for Structured Documents 1-gen-2021 Bruschi F.Rana V.Sciuto D. +
ASSURE: RTL Locking Against an Untrusted Foundry 1-gen-2021 Pilato, ChristianSciuto, Donatella +
Plaster: An Embedded FPGA-based Cluster Orchestrator for Accelerated Distributed Algorithms 1-gen-2021 Farinelli L.De Vincenti D. V.Damiani A.Stornaiuolo L.Brondolin R.Santambrogio M. D.Sciuto D.
A Comprehensive Methodology to Optimize FPGA Designs via the Roofline Model 1-gen-2021 Del Sozzo E.Rabozzi M.Di Tucci L.Sciuto D.Santambrogio M. D. +
A privacy preserving identification protocol for smart contracts 1-gen-2021 Francesco BruschiTommaso PaulonVincenzo RanaDonatella Sciuto
A Framework for Customizable FPGA-based Image Registration Accelerators 1-gen-2021 Conficconi, DavideD'Arnese, EleonoraDel Sozzo, EmanueleSciuto, DonatellaSantambrogio, Marco D.
Hardware resources analysis of BNNs splitting for FARD-based multi-FPGAs Distributed Systems 1-gen-2020 Marco SpezialiLuca StornaiuoloMarco SantambrogioDonatella Sciuto +
EMPhASIS: An EMbedded Public Attention Stress Identification System 1-gen-2020 Jessica LeoniAsia CiallellaLuca StornaiuoloMarco SantambrogioDonatella Sciuto
Acknowledging Value of Personal Information: a Privacy Aware Data Market for Health and Social Research 1-gen-2020 Francesco BruschiVincenzo RanaDonatella Sciuto +
Enabling Transparent Hardware Acceleration on Zynq SoC for Scientific Computing 1-gen-2020 Luca StornaiuoloFilippo CarloniRiccardo PressianiGiuseppe NataleMarco SantambrogioDonatella Sciuto
BNNsplit: Binarized Neural Networks for embedded distributed FPGA-based computing systems 1-gen-2020 Speziali M.Stornaiuolo L.Santambrogio M. D.Sciuto D. +
A Decentralized System for Fair Token Distribution and Seamless Users Onboarding 1-gen-2020 Bruschi F.Rana V.Sciuto D. +
FPGA-based Embedded System Implementation of Audio Signal Alignment 1-gen-2019 Stornaiuolo LPERINI, MASSIMOSantambrogio MSciuto D
HLS Support for Polymorphic Parallel Memories 1-gen-2019 Stornaiuolo L.Rabozzi M.Sciuto D.Santambrogio M. D.Stramondo G. +
Building High-Performance, Easy-to-use Polymorphic Parallel Memories with HLS 1-gen-2019 L StornaiuoloM RabozziMD SantambrogioD SciutoG Stramondo +
Mine with it or sell it: The superhashing power dilemma 1-gen-2019 Bruschi F.Rana V.GENTILE, LORENZOSciuto D.
A Scalable FPGA Design for Cloud N-Body Simulation 1-gen-2018 Del Sozzo, EmanueleRabozzi, MarcoDI TUCCI, LORENZOSciuto, DonatellaSantambrogio, Marco D.
The Case for Polymorphic Registers in Dataflow Computing 1-gen-2018 PILATO, CHRISTIANSCIUTO, DONATELLA +
FIDA: A framework to automatically integrate FPGA kernels within data-science applications 1-gen-2018 Stornaiuolo, LucaParravicini, AlbertoSciuto, DonatellaSantambrogio, Marco D.
On how to efficiently implement deep learning algorithms on PYNQ platform 1-gen-2018 Stornaiuolo, LucaSantambrogio, MarcoSciuto, Donatella
BuildingRules: A Trigger-Action--Based System to Manage Complex Commercial Buildings 1-gen-2018 Nacci, Alessandro A.Rana, VincenzoSpoletini, PaolaSciuto, Donatella +
METHOD FOR LOCATING A DEVICE INSIDE AN AREA 1-gen-2018 M. SantambrogioD. SciutoA. FrossiL. PaccaniA. NacciA. Cirigliano +
MARC: A resource consumption modeling service for self-aware autonomous agents 1-gen-2017 Ferroni, MatteoCorna, AndreaDamiani, AndreaBrondolin, RolandoSciuto, DonatellaSantambrogio, Marco D. +
Metodo per la localizzazione di un dispositivo all'interno di un’area 1-gen-2017 M. SantambrogioD. SciutoA. FrossiL. PaccaniCONSOLAZIO, NICCOLOA. Nacci +
Optimization strategies in design space exploration 1-gen-2017 Sciuto, Donatella +
A polyhedral model-based framework for dataflow implementation on FPGA devices of iterative stencil loops 1-gen-2016 NATALE, GIUSEPPESTRAMONDO, GIULIOCATTANEO, RICCARDOSCIUTO, DONATELLASANTAMBROGIO, MARCO DOMENICO +
Parallelizing the chambolle algorithm for performance-optimized mapping on FPGA Devices 1-gen-2016 RANA, VINCENZONACCI, ALESSANDRO ANTONIOSCIUTO, DONATELLA +
EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures 1-gen-2016 SANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Ruleset Minimization in Multi-tenant Smart Buildings 1-gen-2016 Piscitello, AndreaNacci, Alessandro A.Rana, VincenzoSantambrogio, Marco D.Sciuto, Donatella
Efficient Hardware Design of Iterative Stencil Loops 1-gen-2016 RANA, VINCENZOBRUSCHI, FRANCESCONACCI, ALESSANDRO ANTONIOSCIUTO, DONATELLA +
Resource-efficient scheduling for partially-reconfigurable FPGA-based systems 1-gen-2016 RABOZZI, MARCOSCIUTO, DONATELLASANTAMBROGIO, MARCO DOMENICO +
Sink state analysis in multi-tenant smart buildings 1-gen-2016 PISCITELLO, ANDREANACCI, ALESSANDRO ANTONIORANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA
EXTRA: Towards an efficient open platform for reconfigurable High Performance Computing 1-gen-2015 SANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
BuildingRules: A Trigger-Action Based System To Manage Complex Commercial Buildings 1-gen-2015 NACCI, ALESSANDRO ANTONIOSCIUTO, DONATELLA +
Experimental evaluation and modeling of thermal phenomena on mobile devices 1-gen-2015 FERRONI, MATTEONACCI, ALESSANDRO ANTONIOTURRI, MATTEOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA
FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration 1-gen-2015 PILATO, CHRISTIANSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
On how to accelerate iterative stencil loops: A scalable streaming-based approach 1-gen-2015 CATTANEO, RICCARDONATALE, GIUSEPPESCIUTO, DONATELLASANTAMBROGIO, MARCO DOMENICO +
Mostrati risultati da 1 a 50 di 484
Legenda icone

  •  file ad accesso aperto
  •  file disponibili sulla rete interna
  •  file disponibili agli utenti autorizzati
  •  file disponibili solo agli amministratori
  •  file sotto embargo
  •  nessun file disponibile