Sfoglia per Autore
A 2-GS/s Time-Interleaved ADC With Embedded Background Calibrations and a Novel Reference Buffer for Reduced Inter-Channel Crosstalk
2025-01-01 Ricci, Luca; Be', Gabriele; Rocco, Michele; Scaletti, Lorenzo; Zanoletti, Gabriele; Bertulessi, Luca; Lacaita, Andrea; Levantino, Salvatore; Samori, Carlo; Bonfanti, ANDREA GIOVANNI
10.6 A 10GHz FMCW Modulator Achieving 680MHz/μs Chirp Slope and 150kHz rms Frequency Error Based on a Digital-PLL with a Non-Uniform Piecewise-Parabolic Digital Predistortion
2024-01-01 Tesolin, Francesco; Dartizio, Simone Mattia; Castoro, Giacomo; Buccoleri, Francesco; Rossoni, Michele; Cherniak, Dmytro; Samori, Carlo; Lacaita, Andrea Leonardo; Levantino, Salvatore
10.1 An 8.75GHz Fractional-N Digital PLL with a Reverse-Concavity Variable-Slope DTC Achieving 57.3fsrms Integrated Jitter and −252.4dB FoM
2024-01-01 Rossoni, Michele; Dartizio, Simone Mattia; Tesolin, Francesco; Castoro, Giacomo; Dell'Orto, Riccardo; Samori, Carlo; Lacaita, Andrea Leonardo; Levantino, Salvatore
A 79.3fsrms Jitter Fractional-N Digital PLL Based on a DTC Chopping Technique
2024-01-01 Moleri, Riccardo; Dartizio, Simone Mattia; Rossoni, Michele; Castoro, Giacomo; Tesolin, Francesco; Cherniak, Dmytro; Samori, Carlo; Lacaita, Andrea Leonardo; Levantino, Salvatore
A 59.3fs Jitter and -62.1dBc Fractional-Spur Digital PLL Based on a Multi-Edge Power-Gating Phase-Detector
2024-01-01 Dartizio, S. M.; Rossoni, M.; Tesolin, F.; Castoro, G.; Samori, C.; Lacaita, A. L.; Levantino, S.
A Low-Jitter Fractional-$N$ Digital PLL Adopting a Reverse-Concavity Variable-Slope DTC
2024-01-01 Rossoni, Michele; Dartizio, Simone M.; Tesolin, Francesco; Castoro, Giacomo; Dell'Orto, Riccardo; Lacaita, Andrea L.; Levantino, Salvatore
A 10-GHz Digital-PLL-Based Chirp Generator With Parabolic Non-Uniform Digital Predistortion for FMCW Radars
2024-01-01 Tesolin, Francesco; Dartizio, Simone M.; Castoro, Giacomo; Buccoleri, Francesco; Rossoni, Michele; Cherniak, Dmytro; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore
A Low-Noise Fractional-$N$ Digital PLL Using a Resistor-Based Inverse-Constant-Slope DTC
2024-01-01 Salvi, Pietro; Dartizio, Simone M.; Rossoni, Michele; Tesolin, Francesco; Castoro, Giacomo; Lacaita, Andrea L.; Levantino, Salvatore
A 66.7fs-Integrated-Jitter Fractional-N Digital PLL Based on a Resistive-Inverse-Constant-Slope DTC
2024-01-01 Salvi, Pietro; Dartizio, Simone M.; Rossoni, Michele; Tesolin, Francesco; Castoro, Giacomo; Lacaita, Andrea L.; Levantino, Salvatore
4.5 A 9.25GHz Digital PLL with Fractional-Spur Cancellation Based on a Multi-DTC Topology
2023-01-01 Castoro, Giacomo; Dartizio, Simone M.; Tesolin, Francesco; Buccoleri, Francesco; Rossoni, Michele; Cherniak, Dmytro; Bertulessi, Luca; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore
4.3 A 76.7fs-lntegrated-Jitter and −71.9dBc In-Band Fractional-Spur Bang-Bang Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering
2023-01-01 Dartizio, Simone M.; Tesolin, Francesco; Castoro, Giacomo; Buccoleri, Francesco; Lanzoni, Luca; Rossoni, Michele; Cherniak, Dmytro; Bertulessi, Luca; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore
Phase Noise Analysis of Periodically ON/OFF Switched Oscillators
2023-01-01 Castoro, Giacomo; Dartizio, Simone M.; Lacaita, Andrea L.; Levantino, Salvatore
A Low-Spur and Low-Jitter Fractional-N Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering
2023-01-01 Dartizio, Sm; Tesolin, F; Castoro, G; Buccoleri, F; Rossoni, M; Cherniak, D; Samori, C; Lacaita, Al; Levantino, S
A Novel LO Phase-Shifting System Based on Digital Bang-Bang PLLs With Background Phase-Offset Correction for Integrated Phased Arrays
2023-01-01 Tesolin, Francesco; Dartizio, Simone M.; Buccoleri, Francesco; Santiccioli, Alessio; Bertulessi, Luca; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore
A 2GS/s 11b 8x Interleaved ADC with 9.2 ENOB and 69.9dB SFDR in 28nm CMOS
2023-01-01 Ricci, L.; Scaletti, L.; Be', G.; Rocco, M.; Bertulessi, L.; Levantino, S.; Lacaita, A.; Samori, C.; Bonfanti, A.
A 68.6fs_rms-Total-integrated-Jitter and 1.5us-Locking-Time Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching
2022-01-01 Dartizio, S. M.; Buccoleri, F.; Tesolin, F.; Avallone, L.; Santiccioli, A.; Iesurum, A.; Steffan, G.; Cherniak, D.; Bertulessi, L.; Bevilacqua, A.; Samori, C.; Lacaita, A. L.; Levantino, S.
A 9GHz 72fs-Total-lntegrated-Jitter Fractional-N Digital PLL with Calibrated Frequency Quadrupler
2022-01-01 Buccoleri, F.; Dartizio, S. M.; Tesolin, F.; Avallone, L.; Santiccioli, A.; Lesurum, A.; Steffan, G.; Bevilacqua, A.; Bertulessi, L.; Cherniak, D.; Samori, C.; Lacaita, A. L.; Levantino, S.
Analysis and Design of 8-to-101.6-GHz Injection-Locked Frequency Divider by Five With Concurrent Dual-Path Multi-Injection Topology
2022-01-01 Garghetti, A.; Lacaita, A. L.; Seebacher, D.; Bassi, M.; Levantino, S.
Investigation of the Statistical Spread of the Time-Dependent Dielectric Breakdown in Polymeric Dielectrics for Galvanic Isolation
2022-01-01 Malavena, G.; Mazzola, J. L.; Greatti, M.; Monzio Compagnoni, C.; Lacaita, A. L.; Marano, V.; Lauria, M.; Paci, D.; Speroni, F.; Sottocornola Spinelli, A.
A Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter and 1.56 μs-Locking-Time
2022-01-01 Dartizio, Simone M.; Buccoleri, Francesco; Tesolin, Francesco; Avallone, Luca; Santiccioli, Alessio; Iesurum, Agata; Steffan, Giovanni; Cherniak, Dmytro; Bertulessi, Luca; Bevilacqua, Andrea; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore
A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner
2022-01-01 Buccoleri, F; Dartizio, Sm; Tesolin, F; Avallone, L; Santiccioli, A; Iesurum, A; Steffan, G; Cherniak, D; Bertulessi, L; Bevilacqua, A; Samori, C; Lacaita, Al; Levantino, S
A 12.5-GHz Fractional-N Type-I Sampling PLL Achieving 58-fs Integrated Jitter
2022-01-01 Mercandelli, Mario; Santiccioli, Alessio; Parisi, Angelo; Bertulessi, Luca; Cherniak, Dmytro; Lacaita, Andrea L.; Samori, Carlo; Levantino, Salvatore
A 900-MS/s SAR-based Time-Interleaved ADC with a Fully Programmable Interleaving Factor and On-Chip Scalable Background Calibrations
2022-01-01 Be', G.; Parisi, A.; Bertulessi, L.; Ricci, L.; Scaletti, L.; Mercandelli, M.; Lacaita, A. L.; Levantino, S.; Samori, C.; Bonfanti, A.
Novel Feed-Forward Technique for Digital Bang-Bang PLL to Achieve Fast Lock and Low Phase Noise
2022-01-01 Bertulessi, Luca; Cherniak, Dmytro; Mercandelli, Mario; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore
A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping
2022-01-01 Dartizio, Simone M.; Tesolin, Francesco; Mercandelli, Mario; Santiccioli, Alessio; Shehata, Abanob; Karman, Saleh; Bertulessi, Luca; Buccoleri, Francesco; Avallone, Luca; Parisi, Angelo; Lacaita, Andrea L.; Kennedy, Michael P.; Samori, Carlo; Levantino, Salvatore
Random telegraph noise in 3d nand flash memories
2021-01-01 Sottocornola Spinelli, A.; Malavena, G.; Lacaita, A. L.; Monzio Compagnoni, C.
A PLL-Based Digital Technique for Orthogonal Correction of ADC Non-Linearity
2021-01-01 Parisi, Angelo; Mercandelli, Mario; Samori, Carlo; Lacaita, ANDREA LEONARDO
A Generalization of the Groszkowski’s Result in Differential Oscillator Topologies
2021-01-01 Buccoleri, Francesco; Lacaita, ANDREA LEONARDO; Bonfanti, ANDREA GIOVANNI
32.8 A 98.4fs-Jitter 12.9-to-15.1GHz PLL-Based LO Phase-Shifting System with Digital Background Phase-Offset Correction for Integrated Phased Arrays
2021-01-01 Santiccioli, A.; Mercandelli, M.; Dartizio, S. M.; Tesolin, F.; Karman, S.; Shehata, A.; Bertulessi, L.; Buccoleri, F.; Avallone, L.; Parisi, A.; Cherniak, D.; Lacaita, A. L.; Kennedy, M. P.; Samori, C.; Levantino, S.
A 13.6-69.1GHz 5.6mW Ring-Type Injection-Locked Frequency Divider by Five with >20% Continuous Locking Range and Operation up to 101.6GHz in 28nm CMOS
2021-01-01 Garghetti, Alessandro; Lacaita, ANDREA LEONARDO; Seebacher, David; Bassi, Matteo; Levantino, Salvatore
A 12.9-to-15.1GHz Digital PLL Based on a Bang-Bang Phase Detector with Adaptively Optimized Noise Shaping Achieving 107.6fs Integrated Jitter
2021-01-01 Mercandelli, M.; Santiccioli, A.; Dartizio, S. M.; Shehata, A.; Tesolin, F.; Karman, S.; Bertulessi, L.; Buccoleri, F.; Avallone, L.; Parisi, A.; Lacaita, A. L.; Kennedy, M. P.; Samori, C.; Levantino, S.
High-Density Solid-State Storage: A Long Path to Success
2021-01-01 Lacaita, A. L.; Sottocornola Spinelli, A.; Monzio Compagnoni, C.
Self-Biasing Dynamic Start-up Circuit for Current-Biased Class-C Oscillators
2021-01-01 Parisi, A.; Tesolin, F.; Mercandelli, M.; Bertulessi, L.; Lacaita, A. L.
Random Telegraph Noise in Flash Memories
2020-01-01 Sottocornola Spinelli, A.; Monzio Compagnoni, C.; Lacaita, A. L.
Variability Effects in Nanowire and Macaroni MOSFETs—Part II: Random Telegraph Noise
2020-01-01 Sottocornola Spinelli, A.; Monzio Compagnoni, C.; Lacaita, A. L.
Characterization and Modeling of Current Transport in Metal/Ferroelectric/Semiconductor Tunnel Junctions
2020-01-01 Franchini, G.; Sottocornola Spinelli, A.; Nicosia, G.; Fumagalli, I.; Asa, M.; Groppi, C.; Rinaldi, C.; Lacaita, A. L.; Bertacco, R.; Monzio Compagnoni, C.
A 66-fs-rms Jitter 12.8-to-15.2-GHz Fractional-N Bang-Bang PLL With Digital Frequency-Error Recovery for Fast Locking
2020-01-01 Santiccioli, Alessio; Mercandelli, Mario; Bertulessi, Luca; Parisi, Angelo; Cherniak, Dmytro; Lacaita, Andrea L.; Samori, Carlo; Levantino, Salvatore
A 66fsrmsJitter 12.8-to-15.2GHz Fractional-N Bang-Bang PLL with Digital Frequency-Error Recovery for Fast Locking
2020-01-01 Santiccioli, A.; Mercandelli, M.; Bertulessi, L.; Parisi, A.; Cherniak, D.; Lacaita, A. L.; Samori, C.; Levantino, S.
A 12.5GHz Fractional-N Type-I Sampling PLL Achieving 58fs Integrated Jitter
2020-01-01 Mercandelli, M.; Santiccioli, A.; Parisi, A.; Bertulessi, L.; Cherniak, D.; Lacaita, A. L.; Samori, C.; Levantino, S.
Variability Effects in Nanowire and Macaroni MOSFETs—Part I: Random Dopant Fluctuations
2020-01-01 Sottocornola Spinelli, A.; Monzio Compagnoni, C.; Lacaita, A. L.
A 1.6-to-3.0-GHz Fractional-N MDLL With a Digital-to-Time Converter Range-Reduction Technique Achieving 397-fs Jitter at 2.5-mW Power
2019-01-01 Santiccioli, Alessio; Mercandelli, Mario; Lacaita, Andrea L.; Samori, Carlo; Levantino, Salvatore
A 30-GHz Digital Sub-Sampling Fractional-N PLL With -238.6-dB Jitter-Power Figure of Merit in 65-nm LP CMOS
2019-01-01 Bertulessi, Luca; Karman, Saleh; Cherniak, Dmytro; Garghetti, Alessandro; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore
Compact modeling of GIDL-assisted erase in 3-D NAND Flash strings
2019-01-01 Malavena, G.; Mannara, A.; Lacaita, A. L.; Sottocornola Spinelli, A.; Monzio Compagnoni, C.
16.7 A 30GHz Digital Sub-Sampling Fractional-N PLL with 198fs rms Jitter in 65nm LP CMOS
2019-01-01 Grimaldi, Luigi; Bertulessi, Luca; Karman, Saleh; Cherniak, Dmytro; Garghetti, Alessandro; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore
Time-Variant Modeling and Analysis of Multiplying Delay-Locked Loops
2019-01-01 Santiccioli, Alessio; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore
A 1.6-to-3.0-GHz Fractional-N MDLL with a Digital-to-Time Converter Range-Reduction Technique Achieving 397fs Jitter at 2.5-mW Power
2019-01-01 Santiccioli, A.; Mercandelli, M.; Lacaita, A. L.; Samori, C.; Levantino, S.
Current Transport in Polysilicon-channel GAA MOSFETs: A Modeling Perspective
2019-01-01 Mannara, A.; Sottocornola Spinelli, A.; Lacaita, A. L.; Monzio Compagnoni, C.
A Low-Power and Wide-Locking-Range Injection-Locked Frequency Divider by Three with Dual-Injection Divide-by-Two Technique
2018-01-01 Garghetti, Alessandro; Lacaita, Andrea L.; Levantino, Salvatore
Random dopant fluctuation and random telegraph noise in nanowire and macaroni MOSFETs
2018-01-01 Sottocornola Spinelli, A.; Monzio Compagnoni, C.; Lacaita, A. L.
Impact of CMOS Scaling on Switched-Capacitor Power Amplifiers
2018-01-01 Truppi, Alessandro; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore; Ronchi, Marco; Sosio, Marco
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