Sfoglia per Autore
Accelerator Design with High-Level Synthesis
In corso di stampa Pilato, C.; Soldavini, S.
Foundation Models in Augmentative and Alternative Communication: Opportunities and Challenges
2024-01-01 Di Paola, Ambra; Muraro, Serena; Marinelli, Roberto; Pilato, Christian
Embedded Computer Systems: Architectures, Modeling, and Simulation
2023-01-01 Silvano, C.; Pilato, C.; Reichenbach, Marc
Automatic Creation of High-Bandwidth Memory Architectures from Domain-Specific Languages: The Case of Computational Fluid Dynamics
2023-01-01 Soldavini, Stephanie; Friebel, Karl F. A.; Tibaldi, Mattia; Hempel, Gerald; Castrillon, Jeronimo; Pilato, Christian
Towards High-Level Synthesis of Quantum Circuits
2023-01-01 Lu, C.; Pilato, C.; Basu, K.
Iris: Automatic Generation of Efficient Data Layouts for High Bandwidth Utilization
2023-01-01 Soldavini, S.; Sciuto, D.; Pilato, C.
Optimizing the Use of Behavioral Locking for High-Level Synthesis
2023-01-01 Pilato, C.; Collini, L.; Cassano, L.; Sciuto, D.; Garg, S.; Karri, R.
Using Static Analysis for Enhancing HLS Security
2023-01-01 Collini, L.; Ah-kiow, J.; Pilato, C.; Karri, R.; Tan, B.
Message from the Program Chairs: ICCD 2023
2023-01-01 Pilato, C.; Trancoso, P.
Not All Fabrics Are Created Equal: Exploring eFPGA Parameters for IP Redaction
2023-01-01 Bhandari, J.; Moosa, A. K. T.; Tan, B.; Pilato, C.; Gore, G.; Tang, X.; Temple, S.; Gaillardon, P.; Karri, R.
Generating Posit-Based Accelerators With High-Level Synthesis
2023-01-01 Murillo, R.; Barrio, A. A. D.; Botella, G.; Pilato, C.
A Survey of FPGA Optimization Methods for Data Center Energy Efficiency
2023-01-01 Tibaldi, M.; Pilato, C.
Protecting Hardware IP Cores During High-Level Synthesis
2022-01-01 Pilato, Christian; Sciuto, Donatella; Regazzoni, Francesco; Garg, Siddharth; Karri, Ramesh
Invited: High-level design methods for hardware security: Is it the right choice?
2022-01-01 Pilato, C.; Sciuto, D.; Tan, B.; Garg, S.; Karri, R.
Dynamically-Tunable Dataflow Architectures Based on Markov Queuing Models
2022-01-01 Tibaldi, M.; Palermo, G.; Pilato, C.
High-Level Methods for Hardware IP Protections: Solutions, Trends, and Challenges
2022-01-01 Pilato, C.
Reconfigurable logic for hardware IP protection: Opportunities and challenges
2022-01-01 Collini, L.; Tan, B.; Pilato, C.; Karri, R.
HOLL: Program Synthesis for Higher Order Logic Locking
2022-01-01 Takhar, G.; Karri, R.; Pilato, C.; Roy, S.
Message from the Program Chairs: ICCD 2022
2022-01-01 Awad, A.; Pilato, C.
A Composable Design Space Exploration Framework to Optimize Behavioral Locking
2022-01-01 Collini, L.; Karri, R.; Pilato, C.
Designing ML-resilient locking at register-transfer level
2022-01-01 Sisejkovic, D.; Collini, L.; Tan, B.; Pilato, C.; Karri, R.; Leupers, R.
ALICE: An Automatic Design Flow for eFPGA Redaction
2022-01-01 Tomajoli, C. M.; Collini, L.; Bhandari, J.; Moosa, A. K. T.; Tan, B.; Tang, X.; Gaillardon, P. -E.; Karri, R.; Pilato, C.
Introduction to the Special Section on High-level Synthesis for FPGA: Next-generation Technologies and Applications
2022-01-01 Pilato, C.; Fang, Z.; Hara-Azumi, Y.; Hwang, J.
High-Level Synthesis of Security Properties via Software-Level Abstractions
2021-01-01 Pilato, Christian; Regazzoni, Francesco
Compiler Infrastructure for Specializing Domain-Specific Memory Templates
2021-01-01 Soldavini, Stephanie; Pilato, Christian
CICERO: A Domain-Specific Architecture for Efficient Regular Expression Matching
2021-01-01 Parravicini, Daniele; Conficconi, Davide; DEL SOZZO, Emanuele; Pilato, Christian; Santambrogio, Marco D.
A Survey on Domain-Specific Memory Architectures
2021-01-01 Soldavini, S.; Pilato, C.
Vertical IP Protection of the Next-Generation Devices: Quo Vadis?
2021-01-01 Rai, S.; Garg, S.; Pilato, C.; Herdt, V.; Moussavi, E.; Sisejkovic, D.; Karri, R.; Drechsler, R.; Merchant, F.; Kumar, A.
Automatic Generation of Heterogeneous SoC Architectures with Secure Communications
2021-01-01 Tibaldi, Mattia; Pilato, Christian; Ferrandi, Fabrizio
From Domain-Specific Languages to Memory-Optimized Accelerators for Fluid Dynamics
2021-01-01 Friebel, Karl F. A.; Soldavini, Stephanie; Hempel, Gerald; Pilato, Christian; CASTRILLON MAZO, Jeronimo
Exploring eFPGA-based Redaction for IP Protection
2021-01-01 Bhandari, J.; Moosa, A. K. T.; Tan, B.; Pilato, C.; Gore, G.; Tang, X.; Temple, S.; Gaillardon, P. -E.; Karri, R.
Invited: Bambu: an Open-Source Research Framework for the High-Level Synthesis of Complex Applications
2021-01-01 Ferrandi, Fabrizio; Castellana, Vito Giovanni; Curzel, Serena; Fezzardi, Pietro; Fiorito, Michele; Lattuada, Marco; Minutoli, Marco; Pilato, Christian; Tumeo, Antonino
ASSURE: RTL Locking Against an Untrusted Foundry
2021-01-01 Pilato, Christian; Chowdhury, Animesh Basak; Sciuto, Donatella; Garg, Siddharth; Karri, Ramesh
EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms
2021-01-01 Pilato, C.; Bohm, S.; Brocheton, F.; Castrillon, J.; Cevasco, R.; Cima, V.; Cmar, R.; Diamantopoulos, D.; Ferrandi, F.; Martinovic, J.; Palermo, G.; Paolino, M.; Parodi, A.; Pittaluga, L.; Raho, D.; Regazzoni, F.; Slaninova, K.; Hagleitner, C.
Fortifying RTL Locking Against Oracle-Less (Untrusted Foundry) and Oracle-Guided Attacks
2021-01-01 Limaye, Nimisha; Chowdhury, Animesh B.; Pilato, Christian; Nabeel, Mohammed T. M.; Sinanoglu, Ozgur; Garg, Siddharth; Karri, Ramesh
Opportunistic IP Birthmarking using Side Effects of Code Transformations on High-Level Synthesis
2021-01-01 Badier, H.; Pilato, C.; Lann, J. -C. L.; Coussy, P.; Gogniat, G.
Agile SoC Development with Open ESP : Invited Paper
2020-01-01 Mantovani, P.; Giri, D.; Di Guglielmo, G.; Piccolboni, L.; Zuckerman, J.; Cota, E. G.; Petracca, M.; Pilato, C.; Carloni, L. P.
Is Register Transfer Level Locking Secure?
2020-01-01 Karfa, Chandan; Chouksey, Ramanuj; Pilato, Christian; Garg, Siddharth; Karri, Ramesh
Black-Hat High-Level Synthesis: Myth or Reality?
2019-01-01 Pilato, Christian; Basu, Kanad; Regazzoni, Francesco; Karri, Ramesh
TaintHLS: High-Level Synthesis For Dynamic Information Flow Tracking
2019-01-01 Pilato, C.; Wu, K.; Garg, S.; Karri, R.; Regazzoni, F.
CAD-Base: An Attack Vector into the Electronics Supply Chain
2019-01-01 Basu, Kanad; Saeed, Samah Mohamed; Pilato, Christian; Ashraf, Mohammed; Nabeel, Mohammed Thari; Chakrabarty, Krishnendu; Karri, Ramesh
High-Level Synthesis of Benevolent Trojans
2019-01-01 Pilato, Christian; Basu, Kanad; Shayan, Mohammed; Regazzoni, Francesco; Karri, Ramesh
The Case for Polymorphic Registers in Dataflow Computing
2018-01-01 Ciobanu, Cătălin Bogdan; Gaydadjiev, Georgi; Pilato, Christian; Sciuto, Donatella
DarkMem: Fine-grained power management of local memories for accelerators in embedded systems
2018-01-01 Pilato, C.; Carloni, L. P.
Securing Hardware Accelerators: A New Challenge for High-Level Synthesis
2018-01-01 Pilato, Christian; Garg, Siddharth; Wu, Kaijie; Karri, Ramesh; Regazzoni, Francesco
Enabling Automated Bug Detection for IP-based Designs using High-Level Synthesis
2018-01-01 Fezzardi, Pietro; Pilato, Christian; Ferrandi, Fabrizio
Bridging the Gap between Software and Hardware Designers Using High-Level Synthesis
2018-01-01 Pilato, Christian
TAO: Techniques for algorithm-level obfuscation during high-level synthesis
2018-01-01 Pilato, C.; Regazzoni, F.; Karri, R.; Garg, S.
System-Level Optimization of Accelerator Local Memory for Heterogeneous Systems-on-Chip
2017-01-01 Pilato, Christian; Mantovani, Paolo; Di Guglielmo, Giuseppe; Carloni, Luca P.
Scala-based domain-specific language for creating accelerator-based SoCs
2016-01-01 Durelli, GIANLUCA CARLO; Spada, Fabrizio; Pilato, Christian; Santambrogio, MARCO DOMENICO
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