Sfoglia per Autore
A reconfiguration algorithm for delay minimization in VLSI/WSI array processors
1987-01-01 Sciuto, Donatella
On functional testing of array processors
1988-01-01 F., Lombardi; Sciuto, Donatella
Array partitioning: a methodology for reconfigurability and reconfiguration problems
1988-01-01 Distante, Fausto; Lombardi, F.; Sciuto, Donatella
An Algorithm for Functional Reconfiguration of Fixed-Size Arrays
1988-01-01 F., Lombardi; Sciuto, Donatella; R., Stefanelli
Linear Testability Conditions for Two-Dimensional Arrays
1989-01-01 F., Lombardi; Sciuto, Donatella
Linear and Constant Testability of Hexagonally Connected Arrays
1989-01-01 Sciuto, Donatella
Testing of serial input convolvers
1989-01-01 Breveglieri, LUCA ODDONE; Dadda, Luigi; Sciuto, Donatella
Functional testing and verification of array systems
1989-01-01 F., Lombardi; Sciuto, Donatella
Testing approaches for flow graph derived FFTs arrays
1989-01-01 Antola, ANNA MARIA; Sami, Mariagiovanna; Sciuto, Donatella
A comparative evaluation of bit-serial convolvers
1989-01-01 A., Balboni; Breveglieri, LUCA ODDONE; Dadda, Luigi; Sciuto, Donatella
Constant Testability For Single Fault-detection In 2-dimensional Systolic Array Structures For Matrix Multiplication
1990-01-01 F., Lombardi; Sciuto, Donatella; W. K., Huang
Testing of serial input convolvers
1990-01-01 Breveglieri, LUCA ODDONE; Dadda, Luigi; Sciuto, Donatella
A New Software Tool For Testability Analysis of Complex Vlsi Devices
1990-01-01 G., Buonanno; Sciuto, Donatella
Fault identification and fault location in algorithmic flow-driven WSI architectures
1990-01-01 Antola, ANNA MARIA; Sami, Mariagiovanna; Sciuto, Donatella
Guidelines For Testing Wsi Sequential Arrays
1991-01-01 G., Buonanno; Sciuto, Donatella; Y. N., Shen
Testing of Very Large Systems - A Hierarchical Approach To Fault Coverage Evaluation
1991-01-01 Distante, Fausto; Sami, Mariagiovanna; Sciuto, Donatella
Testing and Diagnosis of FFT Arrays
1991-01-01 Antola, ANNA MARIA; Sami, Mariagiovanna; Sciuto, Donatella
Design for testability techniques for CMOS combinational gates
1991-01-01 G., Buonanno; F., Lombardi; Sciuto, Donatella; Y. N., Shen
Architectures for edge extraction modules for the Hough transform
1991-01-01 M. G., Albanesi; Breveglieri, LUCA ODDONE; F., Salieri; Sciuto, Donatella
Testability Conditions for Two-Dimensional Bilateral Arrays
1991-01-01 Sciuto, Donatella
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