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Task scheduling with conguration prefetching and anti-fragmentation techniques on dynamically recongurable systems 1-gen-2008 REDAELLI, FRANCESCOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA
A Reconguration-aware Floorplacer for FPGAs 1-gen-2008 MONTONE, ALESSIOREDAELLI, FRANCESCOSANTAMBROGIO, MARCO DOMENICO +
An ILP Formulation for the Task Graph Scheduling Problem Tailored to Bi-dimensional Reconfigurable Architectures 1-gen-2008 REDAELLI, FRANCESCOSANTAMBROGIO, MARCO DOMENICO +
The Shining embedded system design methodology based on self dynamic reconfigurable architectures 1-gen-2008 CURINO, CARLO ALDORANA, VINCENZOREDAELLI, FRANCESCOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA
Partitioning and Scheduling of Task Graphs on Partially Dynamically Reconfigurable FPGAs 1-gen-2009 REDAELLI, FRANCESCOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Scheduling and 2D Placement Heuristics for Partially Reconfigurable Systems 1-gen-2009 REDAELLI, FRANCESCOSANTAMBROGIO, MARCO DOMENICORANA, VINCENZO +
An ILP Formulation for the Task Graph Scheduling Problem Tailored to Bi-Dimensional Reconfigurable Architectures 1-gen-2009 REDAELLI, FRANCESCOSANTAMBROGIO, MARCO DOMENICO +
A Design Workflow for Dynamically Recongurable Multi-FPGA Systems 1-gen-2010 SANTAMBROGIO, MARCO DOMENICOREDAELLI, FRANCESCOCANCARE', FABIOSCIUTO, DONATELLA +
Floorplacement for Partial Reconfigurable FPGA-Based Systems 1-gen-2011 REDAELLI, FRANCESCOSCIUTO, DONATELLASANTAMBROGIO, MARCO DOMENICO +
Optimizing the demand captured by a railway system with a regular timetable 1-gen-2011 CORDONE, ROBERTOREDAELLI, FRANCESCO
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