Sfoglia per Autore
A FPGA coprocessor for the cryptographic Tate pairing over Fp
2008-01-01 Barenghi, Alessandro; Bertoni, G.; Breveglieri, LUCA ODDONE; Pelosi, Gerardo
Fast Disk Encryption Through GPGPU Acceleration
2009-01-01 Agosta, Giovanni; Barenghi, Alessandro; A., Di Biagio; F., De Santis; Pelosi, Gerardo
Design of a Parallel AES for Graphics Hardware using the CUDA framework
2009-01-01 A., Di Biagio; Barenghi, Alessandro; Pelosi, Gerardo; Agosta, Giovanni
Low Voltage Fault Attacks on the RSA Cryptosystem
2009-01-01 Barenghi, Alessandro; G., Bertoni; E., Parrinello; Pelosi, Gerardo
Fault attack on AES with single-bit induced faults
2010-01-01 Barenghi, Alessandro; G., Bertoni; Breveglieri, LUCA ODDONE; M., Pellicioli; Pelosi, Gerardo
Improving first order differential power attacks through Digital Signal Processing
2010-01-01 Barenghi, Alessandro; Pelosi, Gerardo; Y., Teglia
Countermeasures against fault attacks on software implemented AES: effectiveness and cost
2010-01-01 Barenghi, Alessandro; Breveglieri, LUCA ODDONE; I., Koren; Pelosi, Gerardo; F., Regazzoni
Record Setting Software Implementation of DES Using CUDA
2010-01-01 Agosta, Giovanni; Barenghi, Alessandro; F., De Santis; Pelosi, Gerardo
Low voltage fault attacks to AES
2010-01-01 Barenghi, Alessandro; G., Bertoni; Breveglieri, LUCA ODDONE; M., Pellicioli; Pelosi, Gerardo
Smart metering in power grids: Application scenarios and security
2011-01-01 Barenghi, Alessandro; Breveglieri, LUCA ODDONE; Fugini, Mariagrazia; Pelosi, Gerardo
On the Vulnerability of FPGA Bitstream Encryption against Power Analysis Attacks - Extracting Keys from Xilinx Virtex-II FPGAs
2011-01-01 A., Moradi; Barenghi, Alessandro; T., Kasper; C., Paar
Information Leakage Discovery Techniques to Enhance Secure Chip Design
2011-01-01 Barenghi, Alessandro; Pelosi, Gerardo; Y., Teglia
Fault attack to the elliptic curve digital signature algorithm with multiple bit faults
2011-01-01 Barenghi, Alessandro; G., Bertoni; Breveglieri, LUCA ODDONE; A., Palomba; Pelosi, Gerardo
Security and Privacy in Smart Grid Infrastructures
2011-01-01 Barenghi, Alessandro; Pelosi, Gerardo
On the efficiency of design time evaluation of the resistance to power attacks
2011-01-01 Barenghi, Alessandro; G. M., Bertoni; F., De Santis; F., Melzani
Exploring the Feasibility of Low Cost Fault Injection Attacks on Sub-Threshold Devices through an example of a 65nm AES implementation
2011-01-01 Barenghi, Alessandro; C., Hocquet; D., Bol; F. X., Standaert; F., Regazzoni; I., Koren
A novel fault attack against ECDSA
2011-01-01 Barenghi, Alessandro; G., Bertoni; A., Palomba; R., Susella
Injection Technologies for Fault Attacks on Microprocessors
2012-01-01 Barenghi, Alessandro; G. M., Bertoni; Breveglieri, LUCA ODDONE; M., Pellicioli; Pelosi, Gerardo
Automated Security Analysis of Dynamic Web Applications through Symbolic Code Execution
2012-01-01 Agosta, Giovanni; Barenghi, Alessandro; A., Parata; Pelosi, Gerardo
A Code Morphing Methodology to Automate Power Analysis Countermeasures
2012-01-01 Agosta, Giovanni; Barenghi, Alessandro; Pelosi, Gerardo
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